H618 / H616
Cheap quad Cortex-A53 TV-box SoC that became the Pi Zero class SBC chip: 4K60 H.265 decode, HDMI 4K60, one GbE MAC plus an internal 100M PHY, no PCIe and no USB 3.0, 32-bit DRAM up to 4 GB, bare H616 USD 3.02 (Ozdisan) to 9.07 (LCSC) for a single piece.
- CPU
- 4x A53 up to 1.5 GHz
- GPU
- Mali-G31
- NPU
- None
- Video
- 4K60 H.265/VP9 dec, 4K25 H.264 enc
- PCIe
- None
What the H618 / H616 is for
Right for
- Lowest-cost headless Linux boards and modules: the bare H616 is USD 6.19 at 119 pieces on LCSC and pairs with a USD 0.53 AXP313A, and CPU, USB, MMC, GbE, thermal, cpufreq and crypto are all in mainline Linux
- Klipper and 3D-printer host modules in the Raspberry Pi CM4 footprint: BIGTREETECH CB1 (H616) runs mainline Linux 7.0 in its vendor image and drops into Manta controller boards
- Android TV and media players: 4K60 H.265, VP9 and AVS2 decode, HDMI with HDCP 2.2 and HDR10, CVBS out, on the Allwinner Android BSP
- Pi Zero form factor products: Orange Pi Zero 2W, Banana Pi BPI-M4 Zero and Walnut Pi ZeroW all fit a 65 x 30 mm board with LPDDR4
- Battery handhelds with an RGB LCD (H700 variant): Anbernic RG35XX family, with mainline device trees and AXP717 PMIC support since Linux 6.10
Wrong for
- Anything needing PCIe, USB 3.0 or SATA: the datasheet lists none of them, only four USB 2.0 ports
- Products that need HDMI or any display output on mainline Linux today: no H616 TCON, HDMI or display-engine pipeline is in any release or in linux-next as of 2026-10-13
- Camera or vision products: the H616 package has no camera interface (the same die as T507 exposes it) and no NPU
- More than 4 GB of DRAM or a second gigabit port: 32-bit DRAM to 4 GB, and the second MAC is 100M only, internal PHY
- Industrial temperature range: the datasheet rates ambient -20 to 70 C
Cost and constraints
- BOM floor is the SoC (USD 6.19 to 9.07 on LCSC), one AXP313A (USD 0.45 to 0.87), 32-bit DDR3 or LPDDR4, a 24 MHz crystal and an Ethernet PHY if you need GbE
- TFBGA284, 14 x 12 mm, 0.65 mm pitch, 0.35 mm balls: the open KiCad LPDDR4 reference (Kononenko-K) fans it out on 4 layers
- Mainline U-Boot DRAM init supports DDR3, LPDDR3 and LPDDR4 but not DDR4, so pick LPDDR4 or DDR3 if you want an open boot chain
- H618 needs newer firmware than H616 (U-Boot v2023.07, TF-A v2.9, sunxi-tools git master) because of a moved CPU configuration block
- Allwinner publishes no H618, H313 or H700 datasheet; designs on those parts lean on the H616 Rev 1.0 datasheet and vendor schematics
Inside the H618 / H616
Drawn by Groundplane from the datasheet rev 1.0. Not Allwinner artwork.
- 32-bit DDR3/DDR4/LPDDR3/4
- eMMC 5.1 (8-bit)
- SD 3.0 / SDIO 3.0
- SPI NOR or SPI NAND
- 8-bit raw NAND
- 4x Cortex-A53 up to 1.5 GHz
- NEON, VFPv4, TrustZone
- Mali-G31
- 2D engine (G2D), 2048x2048
- De-interlacer with TNR
- H.265/VP9/AVS2 4K60 decoder
- H.264 4K30 decoder
- H.264 4K25 encoder
- JPEG codec
- 32-bit DRAM controller
- DDR3/DDR4/LPDDR3/LPDDR4
- IOMMU for DE, VE, G2D, DI
- Display engine to 4096x2048
- HDMI TX 4K60, HDCP 2.2
- CVBS TV encoder
- Secure boot ROM
- Crypto engine, TRNG
- eFuse (SID)
- CCU, 12 PLLs, 24 MHz DCXO
- 16-ch DMA, timers, RTC
- 4 thermal sensors
- Audio hub, DAC, DMIC
- USB 2.0 OTG (FEL port)
- 3x USB 2.0 host
- GbE MAC (RGMII/RMII)
- 100M MAC with internal PHY
- HDMI 4K60, CVBS out
- I2S/TDM x3, PDM, S/PDIF
- Line-out DAC
- UART x6, TWI x6, SPI x2
- PWM x4, CIR, LRADC, TSC
Read from the documents
Each value names the document it was read from.
| CPU | 4x Cortex-A53, ARMv8, NEON, VFPv4, TrustZone, LPAE | Datasheet Rev 1.0, 2.1 |
|---|---|---|
| CPU clock | Up to 1.512 GHz on speed grades 1, 3 and 5; 1.416 GHz on grades 0 and 2; 1.32 GHz on grade 4 (mainline OPP table, keyed on the SID speed bin). The datasheet states no clock. | Other |
| GPU | Mali-G31; OpenGL ES 1.0/2.0/3.2, Vulkan 1.1, OpenCL 2.0 | Datasheet Rev 1.0, 2.2 |
| Video decode | H.265 Main10 L5.1 up to 4K60 or 6K30; VP9 Profile 2 and AVS2 10-bit up to 4K60; H.264 HP L4.2 up to 4K30; MPEG-1/2/4, H.263, VP8, VC-1, AVS/AVS+, Xvid, Sorenson up to 1080p60 | Datasheet Rev 1.0, 2.4.1 |
| Video encode | H.264 BP/MP/HP up to 4K25 (4096x4096 max), I/P frames, single reference, CBR/VBR 256 kbit/s to 100 Mbit/s, 8 ROIs | Datasheet Rev 1.0, 2.4.2 |
| JPEG | JPEG decode up to 45 MPPS; MJPEG/JPEG baseline encode, 1080p60 snapshot | Datasheet Rev 1.0, 2.4.1, 2.4.2 |
| Memory | 32-bit DDR3, DDR3L, DDR4, LPDDR3 or LPDDR4; up to 4 GB | Datasheet Rev 1.0, 2.3.2 |
| Storage | eMMC 5.1 (8-bit, HS-DDR 100 MHz at 1.8 V), SD 3.0, SDIO 3.0, 8-bit raw NAND (ONFI 2.0, Toggle 2.0, 80-bit ECC per 1 KB), SPI NOR and SPI NAND boot | Datasheet Rev 1.0, 2.3.1 to 2.3.4 |
| Display | HDMI up to 4K60 (HDCP 2.2 and 1.4, CEC, HDR10, 8/10-bit), CVBS TV out (PAL/NTSC); display engine output to 4096x2048, write-back for dual display. No LCD interface on the H616 package | Datasheet Rev 1.0, 2.5.1, 2.7 |
| Camera | None: the H616 feature list has no CSI or parallel camera input | Datasheet Rev 1.0, 2 |
| PCIe | None | Datasheet Rev 1.0, 2.10 |
| SATA | None | Datasheet Rev 1.0, 2.10 |
| USB | 1x USB 2.0 OTG (USB0, also the FEL download port), 3x USB 2.0 host, all with integrated PHYs | Datasheet Rev 1.0, 2.10.1 |
| Ethernet | EMAC0 10/100/1000 with RGMII or RMII to an external PHY; EMAC1 10/100 with an embedded 100M PHY and no external MAC pins; both usable at once | Datasheet Rev 1.0, 2.10.2 |
| Audio | Stereo DAC (line out, 95 dB SNR), audio hub with 3 external I2S/PCM/TDM (up to 16 ch), up to 8 PDM microphones, S/PDIF (OWA) out, HDMI audio. No analog ADC input | Datasheet Rev 1.0, 2.8 |
| Security | Crypto engine (AES, DES, 3DES, XTS, SHA-1 to SHA-512, HMAC, RSA to 4096, ECC to 521), TRNG, eFuse with secure zone, secure boot, secure memory and peripheral control | Datasheet Rev 1.0, 2.9 |
| Other I/O | 6x UART (two 2-wire, four 4-wire), 2x SPI (quad), 6x TWI, 4x PWM, CIR receiver, 1-ch 6-bit LRADC, transport stream controller with DVB-CSA descrambler | Datasheet Rev 1.0, 2.10.3 to 2.10.9 |
| Package | TFBGA284, 14 x 12 mm, 0.65 mm pitch, 0.35 mm balls; MSL3; 119 per tray | Datasheet Rev 1.0, 2.11, 8.1, 8.2 |
| Temperature | Ambient -20 to 70 C; junction -20 to 110 C recommended, 125 C absolute maximum | Datasheet Rev 1.0, Table 5-1, Table 5-2 |
| Thermal | theta-JA 27.26, theta-JB 15.4, theta-JC 13.47 C/W (JEDEC 4-layer board, still air); four sensors in GPU, VE, CPU and DDR | Datasheet Rev 1.0, Table 6-1, 2.6.7 |
Variants
| H616 | The documented part: Datasheet and User Manual Rev 1.0. linux-sunxi reports most H616 chips are die revision 0, with the CPU configuration block at 0x09010000. Allwinner's H series page no longer lists the H616; the old H616 product URL now shows the H618. | Datasheet Rev 1.0 |
|---|---|---|
| H618 | Same package and pinout in practice (MangoPi sells MQ-Quad with either part; Yuzuki Chameleon's H616 schematic ships with H618). Allwinner's page quotes H.265 decode to 8K24, H.264/VP9/AVS2 to 4K30, H.264 encode 4K25, and adds HDR10+ and HDR Vivid. linux-sunxi reports 1 MB L2 and die revision 2 (CPU configuration block moved to 0x08100000), which needs U-Boot v2023.07, TF-A v2.9 and current sunxi-fel. No datasheet published. | Product brief |
| H313 | Entry 4K OTT part per Allwinner: H.265 decode 4K60, H.264/VP9/AVS2 4K30, H.264 and JPEG encode only to 1080p60, HDR10 and HLG only, 5 TWI instead of 6; Android or Tina Linux. Used in Tanix TX1 and X96Q boxes. No datasheet published. | Product brief |
| H700 | Package variant that brings out the RGB LCD pins and reportedly the NMI pin (linux-sunxi). Mainline has a separate H700 CPU speed bin (Linux 6.11). Shipped in Anbernic RG35XX and RG40XX handhelds with an AXP717 PMIC and LPDDR4. Not listed on Allwinner's site; no datasheet published. Mainline has no LCD/TCON driver for it yet. | Other |
| T507 (sibling) | Same die per linux-sunxi, packaged to expose LCD and camera interfaces for automotive and industrial use. Separate part with its own documents; not covered here. | Other |
What to watch when you design with it
Power and PMIC
The datasheet core rails are VDD_CPU 0.81 to 1.1 V, VDD_GPU and VDD_SYS 0.81 to 0.99 V, with 1.8 V for AVCC, PLL, HDMI, DCXO and VDD18_DRAM and 3.3 V for VCC_IO and USB. Almost every H618 and later H616 board checked uses the X-Powers AXP313A (3 bucks, 3 LDOs, QFN-20 3 x 3 mm): Orange Pi Zero 3 and Zero 2W, BTT CB1 and BTT Pi, Sipeed Longan Module 3H, MangoPi MQ-Quad and MCore, Walnut Pi, BPI-M4 Berry and Zero. The Zero 3 device tree shows the whole tree: DCDC1 0.81 to 0.99 V for VDD_GPU and VDD_SYS together, DCDC2 0.81 to 1.1 V for VDD_CPU, DCDC3 1.1 V for LPDDR4, ALDO1 1.8 V and DLDO1 3.3 V, all fed from 5 V. DCDC2 is rated 3 A at 5 V in. The older Orange Pi Zero 2 and the X96 Mate and X96Q boxes use the larger AXP305 instead; H700 handhelds use AXP717 (charger, USB-C). BTT schematics print AXP1530A beside AXP313A as an alternate. Power-on order: VCC_IO with VCC_PLL, VDD_SYS at least 8 ms after VCC_PLL, RESET 8 ms after all rails are stable.
Sources: Datasheet Rev 1.0, Other, PMIC V1.0, Board schematic V2.2, Board schematic, Board schematic v1.2
DDR
One 32-bit channel to 4 GB. VCC_DRAM is 1.1 V for LPDDR4, 1.2 V for DDR4 and LPDDR3, 1.35 V for DDR3L and 1.5 V for DDR3, and VDD18_DRAM must come up before VCC_DRAM. Public boards split into DDR3 (Orange Pi Zero 2, BTT CB1 and Pi with Kingston D2516ECMDXGJD, MangoPi MQ-Quad and MCore) and LPDDR4 (Orange Pi Zero 3 and 2W, Longan Module 3H with Micron MT53E1G32D2FW, Walnut Pi, Anbernic H700). DRAM init in mainline U-Boot is open source (dram_sun50i_h616.c, no vendor blob), and its header says it supports DDR3, LPDDR3 and LPDDR4 but not DDR4. The EMAC DMA engine only addresses 32 bits, which the Linux driver handles by keeping its buffers below 4 GB. Allwinner's DRAM layout rules are not public; Kononenko's KiCad H616 boards show complete DDR3 and 4-layer LPDDR4 routing.
Sources: Datasheet Rev 1.0, Other v2026.10, Board schematic V2.2, Board schematic, Other, github.com
High-speed interfaces
There is no PCIe, USB 3.0 or SATA, so a design's fastest external links are HDMI, the RGMII Ethernet and four USB 2.0 ports. Gigabit needs an external PHY on EMAC0: RTL8211F on Orange Pi Zero 2, BPI-M4 Berry, BTT CB1 and Longan Pi 3H; linux-sunxi reports a Motorcomm YT8531 on the Zero 3, whose device tree uses rgmii-rxid. EMAC1 and its internal 100M PHY are what Zero 2W, BPI-M4 Zero, BTT Pi and Walnut Pi 1B bring out for 100M Ethernet, but mainline has no driver for that path in any release: the MAC glue is in linux-next and the AC200/AC300 PHY driver is not upstream. Wi-Fi goes on SDIO (AW859A, RTL8189FTV, RTL8723DS, XR829 on the boards checked).
Sources: Datasheet Rev 1.0, Other, Board schematic V2.2, git.kernel.org
Boot and FEL
The boot ROM reads the FEL pin: high runs the media boot (try order SD on SMHC0, eMMC on SMHC2, NAND, SPI NOR, SPI NAND), low enters the USB download mode on USB0 OTG. Boot media can also be fixed by GPIO straps (BOOT_SEL on the PC pins) or by eFuse, and once secure boot is fused only signed firmware loads. SLC raw NAND boot is not available on the H616 package. FEL works with sunxi-fel from linux-sunxi/sunxi-tools, but only from git master: the last tagged release is from 2016, and H618 die revision 2 support was merged in 2023. Keep the OTG port and a way to pull FEL low (button or test pad) on every board.
Sources: TRM Rev 1.0, Datasheet Rev 1.0, github.com
Thermal
theta-JA is 27.26 C/W on a JEDEC 4-layer board in still air, theta-JC 13.47 C/W, with a recommended junction maximum of 110 C and ambient -20 to 70 C. Four on-chip sensors (GPU, VE, CPU, DDR) feed the mainline thermal driver since Linux 6.9, and cpufreq with speed-bin OPPs landed in 6.10, so mainline throttles properly from 6.10 on. Allwinner publishes no power consumption figures; the datasheet says to ask its FAE.
Sources: Datasheet Rev 1.0, Other
Gotchas
Mainline Linux has no display output on this family as of 7.3-rc7 and linux-next: only clocks and DE33 mixer pieces landed (6.15 to 6.17), and HDMI, TCON and LCD are still in Jernej Skrabec's out-of-tree branches. The linux-sunxi wiki says DRM merged in 6.15; git says otherwise. Hardware video decode (cedrus) is queued for 7.4 but not released. If the product needs HDMI today, it runs the vendor BSP kernel (Orange Pi 5.4 or 6.1) or a distribution carrying those patches (LibreELEC, Armbian vendor builds). H616 and H618 boards are not firmware interchangeable on old U-Boot, TF-A or sunxi-fel builds. The mainline dtsi declares a 256 KB L2 while linux-sunxi reports 512 KB (H616) and 1 MB (H618); none of this is in an Allwinner document.
Sources: Other, github.com, lore.kernel.org
Layout guides for the H618 / H616's interfaces
Public layout guidance for each interface this chip has, from vendors who publish it, plus our calculators.
LPDDR4
Point-to-point routing; TI notes that on-die termination on both ends means no board termination is needed. Byte lanes length-matched to their strobe and command/address matched to the clock, all over a solid reference plane. Impedance targets differ by vendor: TI AM62x and ADI EE-480 use 40 ohm single-ended and 80 ohm differential, Synaptics SL1680 uses 50 and 85 ohm, AMD Versal 45 and 82 ohm. Use the SoC vendor's own target and simulate.
- AM62x, AM62Lx DDR Board Design and Layout GuidelinesTexas Instruments, SPRAD06, C, 2025
- AM62Ax, AM62Px, AM62Dx LPDDR4 Board Design and Layout GuidelinesTexas Instruments, SPRAD66, B, 2024
- ADSP-2184x/ADSP-SC84x LPDDR4 Board Design GuidelinesAnalog Devices, EE-480, 1, 2026
- SL1680 General PCB Design and LPDDR4 & LPDDR4(x) Interface Layout GuidelinesSynaptics, PN 506-001390-01, E
- DDR length matching calculatorGroundplane calculator
DDR4
DDR4 uses pseudo open-drain data signaling and needs a VPP supply, with command/address routed fly-by or as a balanced tree depending on device count. TI AM62x uses 40 ohm single-ended and 80 ohm differential; AMD Versal uses 50 and 90 ohm, relaxed under the BGA. Match data to strobe per byte and command/address to clock.
- AM62x, AM62Lx DDR Board Design and Layout GuidelinesTexas Instruments, SPRAD06, C, 2025
- Versal Adaptive SoC PCB Design User Guide: PCB Routing Guidelines for DDR4 InterfacesAMD, UG863, 1.12, 2026
- SL1640 General PCB Design and DDR4 & LPDDR4(x) Interface Layout GuidelinesSynaptics, PN 506-001529-01, D
- PCB Design Guidelines (HSSI, EMIF, MIPI, True Differential, PDN) User Guide: Agilex 5 FPGAs and SoCsAltera, 821801, 2026
- DDR length matching calculatorGroundplane calculator
- Via current calculatorGroundplane calculator
DDR3 / DDR3L
Fly-by command/address with termination at the end of the chain, point-to-point data lanes matched to their strobe, and a clean VREF. ST recommends 55 ohm single-ended and 100 ohm differential for DDR3 and DDR3L on STM32MP1 boards, and shows that a 4-layer board is possible with strict layer allocation.
- STM32MP1 Series DDR memory routing guidelinesSTMicroelectronics, AN5122, 3, 2019
- DDR3 Design Requirements for KeyStone DevicesTexas Instruments, SPRABI1, D, 2022
- SL2610 General PCB Design and DDR3L/DDR4 & LPDDR4(x) Interface Layout GuidelinesSynaptics, PN 506-001629-01, A, 2025
- DDR length matching calculatorGroundplane calculator
LPDDR3
Point-to-point and normally unterminated, with command/address matched to the clock and each byte matched to its strobe. ST gives the same targets for LPDDR3 as for DDR3: 55 ohm single-ended and 100 ohm differential. Few current public guides cover LPDDR3, so treat the SoC vendor's reference layout as the stronger source.
- STM32MP1 Series DDR memory routing guidelinesSTMicroelectronics, AN5122, 3, 2019
- DDR length matching calculatorGroundplane calculator
eMMC
A single-ended bus: CLK, CMD, DAT0 to DAT7 and, for HS400, the data strobe. TI and Synaptics both route it at 50 ohm single-ended, match the group, and keep stubs short; Synaptics places a 22 or 33 ohm series resistor on CLK and STRB. At HS400 TI also checks the eMMC I/O supply impedance, not just the traces.
- AM62Px eMMC HS400 Board Design and Simulation GuidelinesTexas Instruments, SPRADP5, A, 2026
- Astra Machina Foundation Series eMMC ConfigurationSynaptics, PN 506-001594-01, D
- i.MX28 Layout and Design GuidelinesNXP (Freescale), AN4215, 0, 2010
SD card / SDIO
Single-ended CLK, CMD and four data lines over a solid ground plane, at constant trace width and matched length. NXP asks for clock-to-neighbor spacing greater than twice the trace height above the plane and 1.5 times for data and CMD, with 45 degree bends. UHS modes switch the I/O to 1.8 V, so a level translator often sits next to the socket.
- NVT4557/NVT4558/NVT4858 voltage-level translator layout guidelineNXP, AN13158, 1.1, 2022
- i.MX28 Layout and Design GuidelinesNXP (Freescale), AN4215, 0, 2010
- SD Physical Layer Simplified SpecificationSD Association, 9.10, 2023
PCIe
AC-coupled differential lanes routed with no stubs, minimal vias and back-drilled or blind vias where speed demands, with lane-to-lane skew handled by the receiver. Targets differ by guide: TI Jacinto 7 uses 85 ohm differential for lanes and 100 ohm for the reference clock, while TI's earlier SoC guide tabulates 100 ohm and, for some devices, 95 ohm. Match the target to your connector and stackup.
- Jacinto7 AM6x, TDA4x, and DRA8x High-Speed Interface Design GuidelinesTexas Instruments, SPRACP4, A, 2024
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
USB 2.0
One D+/D- pair at 90 ohm differential, routed in parallel for its whole length with minimal deviations at the connector and package. NXP keeps clocks and periodic signals at least 50 mils away and other signals at least 20 mils away from the pair.
- High-Speed Layout Guidelines for Signal Conditioners and USB HubsTexas Instruments, SLLA414, A, 2026
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
- i.MX28 Layout and Design GuidelinesNXP (Freescale), AN4215, 0, 2010
HDMI
Four TMDS pairs (three data, one clock) at 100 ohm differential, as both TI guides state, with tight intra-pair matching and as few vias as possible between the SoC and the connector. HDMI also needs 5 V supply switching, DDC and CEC level handling, hot-plug detect and ESD at the connector.
- High-Speed Layout Guidelines for Signal Conditioners and USB HubsTexas Instruments, SLLA414, A, 2026
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
- TPD12S016 PCB Layout Guidelines for HDMI ESDTexas Instruments, SLLA324, 2012
MIPI CSI-2
Same D-PHY rules as DSI: 100 ohm differential lanes in both TI guides, with lane-to-lane skew bounded (40 ps in TI Jacinto 7). Size the lane count and lane rate from the sensor's output format before routing.
- Jacinto7 AM6x, TDA4x, and DRA8x High-Speed Interface Design GuidelinesTexas Instruments, SPRACP4, A, 2024
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
- PCB Design Guidelines (HSSI, EMIF, MIPI, True Differential, PDN) User Guide: Agilex 5 FPGAs and SoCsAltera, 821801, 2026
- MIPI CSI-2 bandwidth calculatorGroundplane calculator
Ethernet (RGMII / RMII)
TI routes MAC-to-PHY (MII family) traces at 50 ohm single-ended, under 6 inches, matched within 20 mils for gigabit, and the PHY-side MDI pairs at 100 ohm differential. RGMII also needs a 1.5 to 2.0 ns clock-to-data delay, added on the board or inside the MAC or PHY (RGMII-ID); decide which before layout so it is not applied twice.
- Ethernet PHY PCB Design Layout ChecklistTexas Instruments, SNLA387, 2021
- PCB Design Guideline for RGMII InterfaceRenesas, R01AN6272EJ0141, 1.41, 2026
- i.MX28 Layout and Design GuidelinesNXP (Freescale), AN4215, 0, 2010
SATA
AC-coupled TX and RX pairs at 100 ohm differential in TI's SoC guide, routed with the same via, stub and reference plane rules as PCIe and USB 3. On Rockchip parts SATA usually shares a combo PHY with PCIe or USB 3, so the lane is routed once to whichever connector the design picks.
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
- High-Speed Layout Guidelines for Signal Conditioners and USB HubsTexas Instruments, SLLA414, A, 2026
Board-level design guides
Impedance and timing, power, thermal and ESD guidance that applies to any board around this chip.
Impedance and timing
Every high-speed interface on the board comes down to the same two numbers: the trace impedance your stackup actually gives, and the delay each trace adds. Set the stackup with your fab first, then route to its impedance table and match lengths in time, not millimeters, where the layers differ.
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
- PCB impedance calculatorGroundplane calculator
- PCB propagation delay calculatorGroundplane calculator
Power delivery
For each switching regulator, place and route the input capacitor first, keep the switching current loop small, and keep the switch node short. Give the SoC rails solid planes and decoupling at the balls, and size current-carrying copper and vias for the real load.
- Five steps to a great PCB layout for a step-down converterTexas Instruments, SLYT614, 2015
- AN-1149 Layout Guidelines for Switching Power SuppliesTexas Instruments, SNVA021, C, 2013
- AN-1229 SIMPLE SWITCHER PCB Layout GuidelinesTexas Instruments, SNVA054, C, 2013
- Buck converter calculatorGroundplane calculator
- LDO power dissipation calculatorGroundplane calculator
- PCB trace width calculatorGroundplane calculator
- Via current calculatorGroundplane calculator
Thermal
Theta-JA is measured on a JEDEC test board that carries most of the heat, so it does not transfer directly to a product board; use it to compare packages and use the psi metrics for estimates. Thermal vias under the package, copper area and copper thickness move the most heat into the board.
- Semiconductor and IC Package Thermal MetricsTexas Instruments, SPRA953, D, 2024
- AN-2020 Thermal Design By Insight, Not HindsightTexas Instruments, SNVA419, C, 2013
- Heatsink thermal resistance calculatorGroundplane calculator
- LDO power dissipation calculatorGroundplane calculator
ESD protection
Place the TVS as close to the connector as design rules allow, route from the connector to the TVS with no stub, and keep the protected IC further from the TVS than the TVS is from the connector. Choose parts by clamping performance and by capacitance low enough for the interface speed.
- ESD Protection Layout GuideTexas Instruments, SLVA680, A, 2022
- Reading and Understanding an ESD Protection Data SheetTexas Instruments, SLLA305, A
- TPD12S016 PCB Layout Guidelines for HDMI ESDTexas Instruments, SLLA324, 2012
- PCB conductor spacing calculator (IPC-2221)Groundplane calculator
Allwinner's hardware design guide
Allwinner's hardware design guide, EVB reference schematics and DDR templates come from Allwinner or an authorized agent, usually under NDA, or through your SoM vendor. We do not link copies circulating elsewhere. The vendor schematics and open designs on the Boards tab are real, shipped layouts on the H618 / H616 and the best public reference.
BSP, mainline and toolkits
| Area | Status | Links |
|---|---|---|
| Vendor BSP kernel | Allwinner's sun50iw9 BSP as republished by Orange Pi: orange-pi-4.9-sun50iw9 (4.9.170, last commit 2022-05), orange-pi-5.4-sun50iw9 (5.4.125, still updated, last commit 2026-08-25) and orange-pi-6.1-sun50iw9 (6.1.31, last commit 2024-07). These carry the HDMI, display, video engine and EMAC1 drivers mainline lacks. U-Boot forks: v2018.05-sun50iw9, v2018.05-h618, v2021.07-sunxi.Checked 2026-10-13 | |
| Mainline Linux | Pinctrl and clocks 5.12; SoC dtsi, Orange Pi Zero 2, EMAC0 and MMC 6.0; USB 6.2; AXP313A PMIC 6.5; Orange Pi Zero 3 6.6; BTT CB1 6.7; Zero 2W 6.8; S/PDIF, thermal and Longan Pi 3H 6.9; cpufreq, AXP717 and Anbernic RG35XX (H700) 6.10; crypto, IOMMU, GPADC 6.11; dedicated MMC match 6.12; audio codec 6.13; Panfrost Mali-G31 6.16; raw NAND 6.19; video engine SRAM 7.2. Not in any release as of v7.3-rc7: display engine, HDMI and LCD, PWM, EMAC1 with the internal PHY (MAC glue in linux-next), and the cedrus video decoder (driver in linux-next, dts applied to sunxi/dt-for-7.4).Checked 2026-10-13 | |
| U-Boot | Mainline since v2021.04 with an open-source DRAM driver (DDR3; LPDDR3 from v2023.10; LPDDR4 from v2024.01; no DDR4). H618 die revision 2 handled since v2023.07. v2026.10 has 9 defconfigs for this family: orangepi_zero2, orangepi_zero3, orangepi_zero2w, x96_mate, x96q, tanix_tx1, transpeed-8k618-t, yuzukihd-chameleon and anbernic_rg35xx_h700. No defconfig for BTT CB1, Longan Pi 3H or the Banana Pi M4 boards.Checked 2026-10-13 | |
| TF-A and SCP | TF-A platform sun50i_h616 since v2.5 (2021-05), covering H313, H616, H618, H700 and T507; H618 die detection since v2.9; AXP313 and AXP717 PMIC support since v2.12. There is no management core (ARISC) on this die, so BL31 runs from DRAM and crust/SCP firmware does not apply.Checked 2026-10-13 | |
| FEL tools | sunxi-fel supports H616 since 2020 and H618 die revision 2 since 2023-10, in git master only; the newest tagged release (v1.4.2) is from 2016.Checked 2026-10-13 | |
| Android | Vendor images: Orange Pi ships Android 12 and Android 12 TV for Zero 2W and Zero 3, Android 10 TV for Zero 2; Banana Pi publishes BPI-H618-Android12 source. No Android 13 or later image found from a board vendor.Checked 2026-10-13 | |
| Distributions | Armbian community builds (kernel 6.18) for Orange Pi Zero 2, Zero 2W and Zero 3, BTT CB1, BPI-M4 Berry and Zero, and Longan Pi 3H. BTT CB1 image V3.1.0 (2026-04-30) is Armbian on Linux 7.0 and U-Boot v2026.04. Buildroot has orangepi_zero3 and orangepi_zero2w defconfigs; OpenWrt sunxi/cortexa53 builds Zero 2, Zero 2W and Zero 3 (also in v25.12.5); DietPi supports Zero 3 and Zero 2W. LibreELEC added an H616 device in master on 2026-09-25 (not yet released). For H700 handhelds ROCKNIX runs a 7.2 kernel; Knulli uses the vendor 4.9 kernel.Checked 2026-10-13 | |
| Community | The linux-sunxi wiki and mailing list are where mainline work happens; Jernej Skrabec's GitHub holds the out-of-tree display, AC200/AC300 Ethernet PHY and H616 integration branches.Checked 2026-10-13 |
H618 / H616 system on modules
Any of these can sit on a carrier board we design.
| Module | Vendor | Connector | RAM | Design files | Price | Buy |
|---|---|---|---|---|---|---|
| BPI-CM7 | Banana Pi | 2x 100-pin board-to-board | LPDDR4 and eMMC (capacity by model) | None found on the product page | ||
| CB1 (H616) | BIGTREETECH | Raspberry Pi CM4 footprint, 2x 100-pin Hirose DF40 | 512 MB or 1 GB DDR3L; eMMC variant | Schematic PDF (V2.2), placement PDFs, STEP (GitHub, no license) | USD 33.68 (BIQU, 1 GB + 32 GB eMMC, out of stock) | |
| Longan Module 3H / Longan Pi 3H | Sipeed | Edge-finger module (pin count not stated) | 1, 2 or 4 GB LPDDR4; 0 or 32 GB eMMC | Module and carrier schematic PDFs, iBOM, mechanical, STEP, KiCad module footprint project | From USD 21.69 (Spotpear headline price) | |
| MCore-H616 (H616 or H313) | MangoPi | 30 x 22 mm | 512 MB or 1 GB DDR3L | Module schematic PDF and Altium library; full Altium carrier projects |
Every public H618 / H616 board
| Board | Vendor | Type | RAM | Notable I/O | Design files | Price | Buy |
|---|---|---|---|---|---|---|---|
| Orange Pi Zero 3 | Orange Pi | SBC, 50 x 55 mm | 1, 1.5, 2 or 4 GB LPDDR4 | GbE, Micro HDMI 4K60, Wi-Fi 5, BT 5.0, 26-pin and 13-pin headers, 16 MB SPI flash | Schematic PDF and mechanical files (Google Drive, linked from the vendor download page) | USD 39.99 (Amazon, 1 GB) | |
| Orange Pi Zero 2W | Orange Pi | SBC, 65 x 30 mm (Pi Zero) | 1, 1.5, 2 or 4 GB LPDDR4 | Mini HDMI 4K60, 2x USB-C (USB 2.0), 24-pin FPC to adapter: 100M Ethernet, 2x USB, audio, IR, Wi-Fi 5, BT 5.0, 40-pin header | Schematic PDFs (board and 24-pin extension) and DXF (Google Drive) | USD 38.99 (Amazon, 1 GB) | |
| Orange Pi Zero 2 (H616) | Orange Pi | SBC, 53 x 60 mm | 512 MB or 1 GB DDR3 | GbE (RTL8211F), Micro HDMI, Wi-Fi 5, BT 5.0, 26-pin and 13-pin headers, 2 MB SPI NOR | Schematic PDFs (v1.3, v1.5) and DXF (Google Drive) | ||
| BPI-M4 Zero | Banana Pi | SBC, 65 x 30 mm (Pi Zero) | 2 or 4 GB, with 8 or 32 GB eMMC | Mini HDMI, 2x USB-C, 24-pin FPC: USB, 100M Ethernet, IR, audio, Wi-Fi module, 40-pin header | Schematic PDF and DXF (Google Drive) | USD 82.80 (BPI shop, 2 GB + 8 GB) | |
| BPI-M4 Berry | Banana Pi | SBC, 85 x 56 mm (Pi 4B) | 2 GB LPDDR4, 8 GB eMMC | GbE (RTL8211F) with PoE pins, 4x USB-A, HDMI, 3.5 mm AV, 40-pin header | Schematic PDF (V00, 2023-11-03) and DXF (Google Drive) | USD 87.28 (BPI shop) | |
| BTT Pi V1.2.1 (H616) | BIGTREETECH | SBC, 85 x 56 mm | 1 GB DDR3L | 4x USB 2.0, HDMI, 100M Ethernet, 12 to 24 V input, USB-to-CAN header | Schematic PDF and STEP/STL (GitHub, no license) | USD 65.99 (BIQU) | |
| PI4B Adapter V1.0 | BIGTREETECH | Carrier | Schematic PDF, placement PDFs, STEP (GitHub) | USD 28.98 (BIQU) | |||
| Manta M4P / M5P / M8P | BIGTREETECH | Carrier | 3D printer controller with on-board stepper drivers | Schematic PDF, size PDFs, STEP per board (GitHub, no license) | USD 68.45 (BIQU, M5P); M8P V2.0 USD 84.38 | ||
| Manta E3EZ V1.0 | BIGTREETECH | Carrier | Schematic PDF and STEP (GitHub) | USD 55.99 (BIQU) | |||
| MQ-Quad (H616 or H618) | MangoPi | SBC, Pi Zero | 1 GB DDR3L | HDMI, USB, Wi-Fi, BT (RTL8723DS), 40-pin header | Schematic PDFs (v1.1, v1.2), DXF, BOM | ||
| Walnut Pi 1B / ZeroW / CM1 | WalnutPi (01Studio) | SBC, 1B 85 x 56 mm; ZeroW 65 x 30 mm; CM1 module 55 x 40 mm | 1, 2 or 4 GB LPDDR4 | 100M Ethernet (1B), Micro HDMI, Dual-band Wi-Fi, BT 5.0, 40-pin header | Schematic PDFs for 1B, ZeroW and CM1 with IO board, Altium footprint library (GitHub, MIT) | ||
| Kickpi K2B | Kickpi | SBC, 81 x 55 mm | 2 or 4 GB; 16 to 64 GB eMMC | GbE, HDMI 4K60, 2x USB-A, USB-C OTG, Wi-Fi, BT | Schematic listed on the vendor download page (not opened) | ||
| Yuzuki Chameleon | YuzukiHD | SBC, Raspberry Pi A | 512 MB to 2 GB DDR3 | 4x USB-C, Wi-Fi, BT (XR829), 100M Ethernet on header, eMMC | Full: EasyEDA Pro project, Gerbers, BOM, pick-and-place, 3D (CERN-OHL-S v2) | ||
| RG35XX 2024 / Plus / H / SP (H700) | Anbernic | Dev kit, Handheld game console | 1 GB LPDDR4 | RGB LCD, AXP717 PMIC with charger, Mainline device trees since 6.10 | None | USD 47.99 (Anbernic, RG35XX 2024) |
Prices and links as checked on the dates in our data; the latest check on this page was 2026-10-13. Amazon links marked * are affiliate links; see our disclosure.
Boards with published design files
| Project | Author | Files | Tool | License |
|---|---|---|---|---|
| Yuzuki Chameleon | YuzukiHD | EasyEDA Pro project, Gerbers (two revisions), Schematic PDF, BOM, Pick-and-place, 3D model, DXF | EasyEDA | CERN-OHL-S v2 |
| Allwinner H616 Devboard (DDR3 and LPDDR4 versions) | Kononenko-K | KiCad schematic and PCB for an H616 + DDR3 + AXP305 board, KiCad schematic and 4-layer PCB for an H616 + LPDDR4 + AXP313A board, Project PDFs, STEP models, Debug adapter KiCad project | KiCad | CERN-OHL-P-2.0 |
| MangoPi MCore-H616 carrier boards (demo board and test board) | MangoPi | Altium project, PcbDoc and SchDocs (carriers only), Module schematic PDF and Altium PcbLib/SchLib | Altium | None stated |
Buying the chip
Allwinner publishes no distributor list for this family. The H616 ships in trays of 119. H618, H313 and H700 were not found at any distributor checked; module vendors (BIGTREETECH, Sipeed, Banana Pi, Walnut Pi) sell modules, not bare chips.
- LCSC
- H616 (C5365289), TFBGA-284, 547 in stock; USD 9.0721 at 1, 7.7123 at 10, 6.883 at 30, 6.1883 at 119 (full tray of 119). No H618, H313 or H700 listing found.
- LCSC (PMIC)
- X-Powers AXP313A (C5365290), QFN-20, 2,809 in stock; USD 0.8695 at 1, 0.5299 at 100, 0.4528 at 1,000.
- Ozdisan
- H616, TFBGA284 tray, 13 in stock, 3 to 4 week lead time; USD 3.016 at 1, 2.392 at 119, 2.296 at 595 (MPQ 119).
Datasheet, TRM and design documents
Linked where they are publicly hosted; we do not rehost Allwinner documents. These are third-party documents: we are not responsible for their accuracy, availability or confidentiality status. Disclosure.
- DatasheetAllwinner H616 DatasheetRev 1.0 · 2019-12-30 · hosted by LCSC · checked 2026-10-13
- TRMAllwinner H616 User ManualRev 1.0 · 2019-12-28 · community mirror (linux-sunxi), not hosted by Allwinner · checked 2026-10-13
- Product briefH618 product page (Chinese)hosted by Allwinner · checked 2026-10-13
- Product briefH313 product page (Chinese)hosted by Allwinner · checked 2026-10-13
- PMICX-Powers AXP313A Datasheet (Chinese)V1.0 · 2021-05-31 · hosted by LCSC · checked 2026-10-13
- Board schematicOrange Pi Zero 3 schematic (H618 + AXP313A + LPDDR4)hosted by Orange Pi (Google Drive) · checked 2026-10-13
- Board schematicBIGTREETECH CB1 schematic (H616 + AXP313A + DDR3, CM4 connectors)V2.2 · 2022-08-12 · hosted by BIGTREETECH (GitHub) · checked 2026-10-13
- Board schematicSipeed Longan Module 3H and Longan Pi 3H schematics (H618 + AXP313A + LPDDR4)hosted by Sipeed · checked 2026-10-13
- Board schematicMangoPi MQ-Quad schematic (H616 + AXP313A + DDR3)v1.2 · hosted by MangoPi · checked 2026-10-13
- Board schematicBanana Pi BPI-M4 Berry schematic (H618 + AXP313A)V00 · 2023-11-03 · hosted by Banana Pi (Google Drive) · checked 2026-10-13
- OtherLinux sun50i-h616-cpu-opp.dtsi (CPU speed grades)hosted by GitHub (torvalds/linux) · checked 2026-10-13
- OtherLinux sun50i-h618-orangepi-zero3.dts (AXP313A rail map)hosted by GitHub (torvalds/linux) · checked 2026-10-13
- OtherU-Boot dram_sun50i_h616.c (supported DRAM types)v2026.10 · hosted by GitHub (u-boot/u-boot) · checked 2026-10-13
- Otherlinux-sunxi wiki: H616 (covers H618, H313, H700, die revisions)hosted by linux-sunxi · checked 2026-10-13
Questions about the H618 / H616
Not the H618 / H616 itself. We have designed and brought up boards on the Allwinner T507 and A527/T527, and on the Rockchip RV1106, RV1126, RV1126B, RK3566, RK3568, RK3576 and RK3588. The work carries over: power tree, DDR and high-speed layout, bring-up and the BSP, read against this chip's own datasheet.
Allwinner's H616 Datasheet Rev 1.0 (2019-12-30) is on LCSC, and a watermark-cleaned copy plus the H616 User Manual Rev 1.0 are on the linux-sunxi H616 page. Allwinner has published no separate H618, H313 or H700 datasheet; its H618 and H313 product pages give only summary specs, so H618 designs work from the H616 documents.
Same package and pinout in practice, so boards take either. The H618 is a later die revision: linux-sunxi reports 1 MB L2 (vs 512 KB) and a CPU configuration block at a new address, which needs U-Boot v2023.07 or later, TF-A v2.9 or later and current sunxi-fel. Allwinner quotes H.265 decode up to 8K24 and HDR10+ for H618. The Linux kernel treats both the same.
Not yet. As of 7.3-rc7 and linux-next on 2026-10-13, no H616/H618 HDMI, TCON or display-engine pipeline is upstream, and hardware video decode (cedrus) is queued for 7.4. CPU, GPU (Panfrost, 6.16), USB, Gigabit Ethernet, MMC, audio codec, thermal and cpufreq are upstream. For HDMI today, use the vendor BSP kernel (Orange Pi 5.4 or 6.1) or a distribution carrying the out-of-tree patches.
The AXP313A: three bucks and three LDOs in a 3 x 3 mm QFN, USD 0.53 at 100 on LCSC, used on Orange Pi Zero 3 and Zero 2W, BTT CB1, Longan Module 3H, MangoPi and Walnut Pi. The Orange Pi Zero 3 device tree is a complete rail map. Mainline Linux supports it since 6.5 and TF-A since v2.12. Battery products use AXP717 (as on the H700 handhelds).
The H618 is cheaper and simpler (no NPU, no PCIe, no USB 3.0, 4 GB DRAM cap) and has an open-source DRAM init in mainline U-Boot. RK3566 adds PCIe 2.1, USB 3.0, a 1 TOPS NPU, MIPI CSI and DSI, and mainline HDMI. RK3528 is the closer TV-box peer with PCIe 2.1 and USB 3.0. Choose the H618 when cost and a small 14 x 12 mm package matter more than I/O.
BIGTREETECH CB1 (H616) uses the CM4 footprint with two 100-pin Hirose DF40 connectors and runs on BTT Manta boards, the PI4B Adapter and other CM4 carriers. Banana Pi BPI-CM7 (H618) has 2x 100-pin board-to-board connectors; Walnut Pi CM1 (H618) is the CM4 size, but CM4 pin compatibility for both was not confirmed.
Related chips and reading
- RK3528TV boxes, media players, small routers
- RK3566HMI, e-ink readers, handhelds, CM4-class SoMs, small routers
- H64K TV boxes, media players, low-cost Linux SBCs with USB 3.0
- A527 / T527Industrial HMI, dual-display terminals, gateways, robots, tablets
- A64Open-hardware SBCs, Linux phones and laptops, kiosks, education
- A133 / R818Tablets, HMI panels, smart displays, handhelds
- RK3328Routers, TV boxes, Klipper hosts
We'll design your H618 board.
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Links and facts on this page checked 2026-10-13. Spotted something out of date? Tell us through the contact form.
Compiled from publicly available sources: datasheets, technical reference manuals, vendor product pages, schematics and source code published by their owners and third parties. We link to documents where others host them and do not host, endorse or vouch for them. Everything on these pages, including our own specs, summaries, block diagrams, comparisons, calculators and design notes, is for reference only and may contain errors or be out of date. It is provided as is, and Groundplane is not responsible for errors in it, for third-party documents, or for any design, board or decision based on it. Always check the manufacturer's current datasheet, reference manual and design guidance before you design a board. Rockchip, Allwinner, Raspberry Pi and other product names are trademarks of their owners; we are not affiliated with any of them. See our disclosure.