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PCB trace width calculator

Minimum trace width for a current and temperature rise, with the resistance, voltage drop and power loss over the run.

Units
Presets
A
Continuous current in the trace.
°C
°C
mm
Minimum width, external layer
1.367mm
PlaneW 1.37 mmT 35 µm (1 oz)External layer, on the surface
Cross-section. Width to scale; copper thickness exaggerated.
Cross-section
0.04785 mm²
Resistance
19.08 mΩ
Voltage drop
57.23 mV
Power loss
171.7 mW
Trace temperature
35 °C
Method

How this is calculated

A = ( I / ( k · ΔT^0.44 ) )^(1 / 0.725)     A in mil², I in A, ΔT in °C
W = A / ( 1.378 · copper oz )                 W in mil
k = 0.048 external, 0.024 internal
R = ρ20 · (1 + 0.00393 · (T − 20)) · L / A
Equation
IPC-2221 publishes charts, not this equation. The constants k, 0.44 and 0.725 are the widely used curve fit to those charts, as published by Advanced Circuits.
Valid range
Up to 35 A, widths up to 400 mil, temperature rise 10 to 100 °C, copper 0.5 to 3 oz/ft². Outside that the curves are extrapolated and the result is marked.
Copper
1 oz/ft² taken as 1.378 mil (35 µm). Resistivity 1.724 × 10⁻⁸ Ω·m at 20 °C (annealed copper, IACS), coefficient 0.00393 per °C, evaluated at ambient plus rise.
Assumes
A single trace with no plane nearby. Planes, board thickness and laminate conductivity change the real rise; IPC-2152 accounts for them and IPC-2221 does not.
Revision
The charts are the ones in IPC-2221B (2012). IPC-2221C (December 2023) supersedes it; its current charts were not checked here.
Sources
FAQ

Questions

IPC-2152 (2009) is built on measured data and adds corrections for board thickness, nearby copper planes and laminate. Its biggest change is for internal layers: testing found internal and external conductors have close to the same temperature rise, so the IPC-2221 internal chart, which halves the external current, is conservative. IPC-2221 is still the figure many fabs and reviewers quote; state which one a width came from.

Under IPC-2221 the internal chart allows half the current of the external one, so k is halved and the area grows by about 2.6 times. That chart was not based on tests of internal conductors; the IPC-2152 test data shows internal traces run at about the same rise as external ones, so the internal result here is conservative.

A 10 °C rise is the common default for power traces on FR-4. Higher rises are acceptable when the board, components and solder joints nearby can take the extra heat, and the laminate stays well below its glass transition temperature.

Use the via current calculator with the same current and temperature rise. Each via has far less copper than the trace feeding it, so a power trace usually needs several in parallel.

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