RK3328
Low-cost quad Cortex-A53 set-top-box SoC from 2017, now mostly found in dual-Ethernet routers: 4K60 HEVC/VP9 decode, HDMI 2.0a, one USB 3.0 host, one GbE MAC plus an on-chip 10/100 PHY, no PCIe, no NPU, no MIPI.
- CPU
- 4x Cortex-A53
- GPU
- Mali-450 MP2
- NPU
- None
- Video
- 4K60 H.265/H.264/VP9 decode, 1080p30 encode
- PCIe
- None
What the RK3328 is for
Right for
- Two-port GbE routers and gateways: one RGMII GbE MAC plus a USB 3.0 GbE adapter (RTL8153B), the NanoPi R2S and Orange Pi R1 Plus pattern
- 4K60 HEVC, H.264 and VP9 playback with HDMI 2.0a, HDCP 2.2 and HDR10/HLG output
- Very low BOM Linux appliances: bare chip at about USD 7 to 8 on LCSC, one RK805 PMIC, 1 GB DDR3/DDR4
- Designs that want a fully mainline stack today: CPU, GPU (Lima), display, HDMI, USB 3.0 and hardware decode are all upstream
- DVB receivers: TS input with CSA2 descrambling and an ISO-7816 smart card interface
Wrong for
- Anything needing PCIe or NVMe: the datasheet lists no PCIe controller
- Cameras or panels: no MIPI CSI or DSI, only an 8-bit BT.656 camera port and HDMI/CVBS out
- AI inference on chip: there is no NPU
- Designs needing more than 4 GB of RAM or fast eMMC: 4 GB total addressing, eMMC tops out at HS200
- New long-life products where a newer part fits: the RK3528 covers the same role with a PCIe or USB 3.0 lane and DDR4/LPDDR4
Cost and constraints
- High-speed I/O budget is one USB 3.0 host, two USB 2.0 ports and one GbE MAC; a second GbE port costs a USB 3.0 bridge chip
- Datasheet Rev 1.4 lists 1.3 GHz maximum CPU clock (Rev 1.2 said 1.4 GHz); board vendors advertise 1.5 GHz and mainline tops out at 1296 MHz
- Memory is one 32-bit DDR3/DDR3L/LPDDR3/DDR4 channel; no LPDDR4
- Every public board pairs it with the RK805-1 PMIC, which keeps the power tree to one IC plus a 5 V input
- No Rockchip-hosted documents remain: the datasheet comes from board vendors or a mirror, and TRM Part 2 is not public anywhere we found
Inside the RK3328
Drawn by Groundplane from the datasheet rev 1.4. Not Rockchip artwork.
- 32-bit DDR3/DDR3L
- LPDDR3, DDR4
- eMMC 5.1 HS200
- 2x SD 3.0
- SPI flash
- 4x Cortex-A53
- NEON, VFPv3, Crypto Ext
- 32 KB L1 I/D per core
- Shared L2 cache
- Mali-450 MP2
- OpenGL ES 2.0, OpenVG 1.1
- 4K60 H.265/H.264/VP9 decoder
- 1080p30 H.264/H.265 encoder
- JPEG decoder
- IEP deinterlace
- 2D graphics engine
- One VOP, 4 layers
- HDR10, HLG, BT.2020
- Cipher engine, TRNG
- TrustZone, secure OTP
- Secure boot
- CRU, PLLs, 24 MHz osc
- Timers, PWM, watchdog
- DMAC, GIC
- BootROM, 36 KB SRAM
- USB 3.0 host
- 2x USB 2.0 (one OTG)
- GbE MAC (RGMII)
- 10/100 MAC + PHY
- HDMI 2.0a TX
- CVBS out
- Line-out DAC
- I2S, PDM, SPDIF
- UART, I2C, SPI, PWM
- SDIO 3.0, IR in
- TS in, smart card
- BT.656 camera in
Read from the documents
Each value names the document it was read from.
| CPU | 4x Arm Cortex-A53 (Armv8-A), NEON, VFPv3, Crypto Extensions, 32 KB L1 I/D per core, shared L2 | Datasheet Rev 1.4, 1.2.1 |
|---|---|---|
| CPU clock | 1.3 GHz maximum (Rev 1.4); Rev 1.2 listed 1.4 GHz | Datasheet Rev 1.4, Table 3-2 |
| GPU | Mali-450 MP2 class 3D engine, OpenGL ES 1.1/2.0, OpenVG 1.1, 500 MHz maximum | Datasheet Rev 1.4, 1.2.10, Table 3-2 |
| NPU | None | Datasheet Rev 1.4 |
| Video decode | H.265 Main/Main10 L5.1, H.264 up to High10 L5.1 and VP9, each up to 4Kx2K@60; VP8, MPEG-1/2/4, VC-1 and MVC up to 1080p60; AVS/AVS+; JPEG up to 8176x8176 | Datasheet Rev 1.4, 1.2.6, 1.2.8 |
| Video encode | H.264 BP/MP/HP L4.2 and H.265 Main L5.0, 1080p30 or 2x 720p30, I and P slices only | Datasheet Rev 1.4, 1.2.6 |
| Memory | 32-bit DDR3-1866, DDR3L-1866, LPDDR3, DDR4; 2 ranks; 4 GB total addressing | Datasheet Rev 1.4, 1.2.4 |
| Display | One VOP: HDMI 2.0a up to 4Kx2K@60 with HDCP 1.4/2.2, 10/12-bit YCbCr 4:4:4/4:2:2/4:2:0; CVBS 480i/576i via 10-bit DAC; HDR10 and HLG with HDR/SDR tone mapping | Datasheet Rev 1.4, 1.2.12, 1.2.13 |
| Camera | 8-bit BT.656 (PAL/NTSC) camera interface up to 5 MP; no MIPI CSI, no ISP | Datasheet Rev 1.4, 1.2.11 |
| PCIe | None listed | Datasheet Rev 1.4 |
| USB | 1x USB 3.0 host (xHCI, one SuperSpeed and one USB 2.0 port); 2x USB 2.0, one of them OTG | Datasheet Rev 1.4, 1.2.15 |
| Ethernet | 2x GMAC: one for an external PHY (RGMII 10/100/1000, RMII 10/100), one wired to the integrated 10/100 PHY (Auto-MDIX, EEE, 100Base-FX) | Datasheet Rev 1.4, 1.2.15 |
| Storage | eMMC 4.41 to 5.1, 8-bit, up to HS200 (no HS400, no CMDQ); 2x SD 3.0/MMC 4.51; SPI flash; SDIO 3.0 | Datasheet Rev 1.4, 1.2.4, 1.2.15 |
| Audio | 2x 8-channel I2S (I2S0 to HDMI), 1x 2-channel I2S/PCM, 8-channel PDM, SPDIF, 24-bit stereo line-out DAC | Datasheet Rev 1.4, 1.2.14 |
| Other I/O | One TS input with 64 PID filters and CSA v2.0 descrambling, ISO-7816 smart card, SPI, I2C up to 1 Mbit/s, UARTs up to 4 Mbps, 4x PWM, IR input, TS-ADC | Datasheet Rev 1.4, 1.2.11, 1.2.15, 1.2.16 |
| Security | TrustZone, cipher engine (AES-128/192/256, DES/TDES, MD5, SHA-1, SHA-256, RSA up to 2048-bit), TRNG, secure OTP, secure boot | Datasheet Rev 1.4, 1.2.5 |
| Core supplies | VDD_CORE 0.95 to 1.35 V (1.00 V typ); VDD_LOGIC (GPU and logic) 0.90 to 1.15 V; DDR IO 1.5 V DDR3, 1.35 V DDR3L, 1.2 V LPDDR3/DDR4 | Datasheet Rev 1.4, Table 3-2 |
| Thermal | Tj below 125 C; ambient 0 to 80 C; theta-JA 19.0, theta-JB 11.6, theta-JC 5.3 C/W (4-layer 95 x 95 mm board) | Datasheet Rev 1.4, Table 3-2, Chapter 4 |
| Package | TFBGA395L, 14 x 14 mm, 0.65 mm pitch, 0.3 mm balls; 1190 per tray | Datasheet Rev 1.4, 1.2.16, 2.1 |
Variants
| RK3328 | The only part number in the datasheet order table (TFBGA395L). Every board and module on this page uses it, and it is the only one stocked by a distributor (LCSC). | Datasheet Rev 1.4 |
|---|---|---|
| RK3318 | TV-box part, not sold through any distributor we found. Mainline Linux describes it with the RK3328 device tree (rockchip,rk3318 compatible on rk3328.dtsi); the A95X Z2 box in mainline uses DDR3 and the on-chip 10/100 PHY. Its datasheet is not publicly hosted by Rockchip or a vendor, so differences are not listed here. | Other v7.3-rc7 |
What to watch when you design with it
Power and PMIC
Every public RK3328 schematic opened (ROCK64, NanoPi R2S, R2C, R2S Plus, NEO3, ROCK Pi E, ROC-RK3328-CC, Olimex RK3328-SOM, MKS PI) uses the Rockchip RK805-1 PMIC. The ROCK64 power tree assigns BUCK1 to VDD_LOGIC (which also feeds the GPU), BUCK2 to VDD_ARM, BUCK3 to VCC_DDR (feedback-set), BUCK4 to 3.3 V VCC_IO, LDO1 to the 1.8 V analog rails, LDO2 to eMMC VCCQ and LDO3 to the 1.0 V PLL, USB and HDMI rails. The datasheet allows VDD_CORE 0.95 to 1.35 V and VDD_LOGIC 0.90 to 1.15 V. ROCK64 takes 5 V at 3 A on a barrel jack; Pine64 warns against feeding 5 V through the GPIO header because the input ferrite is rated 1.5 A.
Sources: PMIC V1.1, Board schematic v3.0, Board schematic V1.1 (2009), Datasheet Rev 1.4, wiki.pine64.org
DDR
One 32-bit channel, one DRAM type per board. Public boards span all four types: DDR3L and LPDDR3 (Olimex SOM), LPDDR3 (ROCK64, Orange Pi R1 Plus LTS), DDR3 (ROC-RK3328-PC, Core-3328-JD4, MKS PI) and DDR4 (NanoPi R2S/R2C/NEO3, ROC-RK3328-CC, ROCK Pi E DDR4 variants). Rockchip's kernel tree ships a separate rk3328-dram-2layer-timing.dtsi with CA de-skew values for 2-layer boards next to the default timing, and rkbin carries DDR init blobs at 333 and 400 MHz. No public RK3328 DDR routing guide was found.
Sources: Datasheet Rev 1.4, github.com, Other, Board schematic Rev B, Board schematic v3.0
High-speed interfaces
There is no PCIe, so the second Ethernet port on RK3328 routers hangs off USB 3.0: the NanoPi R2S, R2C and R2S Plus schematics use an RTL8153B, and the WAN port is the GMAC with an RTL8211E/F or YT8521S PHY over RGMII. The second GMAC is tied to the on-chip 10/100 PHY, which needs only magnetics; ROCK Pi E uses it for its 100 Mbit port. HDMI 2.0a and USB 3.0 PHYs are on-chip.
Sources: Datasheet Rev 1.4, Board schematic V1.1 (2009), Board schematic 2107, Board schematic V3.0
Boot and maskrom
The boot ROM checks eMMC, then SPI NOR, then SPI NAND, then the SD card (SDMMC0 only), and falls back to USB OTG download (maskrom) when none holds a valid ID block. Because eMMC is tried first, boards provide a way to disable it: ROCK64 has an eMMC-disable jumper, and the NanoPi R2S Plus has a maskrom button with its USB-C port used for flashing. Rockchip rkbin carries the RK3328 (rk322xh) USB plug, miniloader and BL31 binaries; mainline U-Boot builds with TF-A for RK3328 boards.
Sources: TRM Rev 1.1, wiki.pine64.org, wiki.friendlyelec.com, Other, docs.u-boot.org
Thermal
The datasheet gives theta-JA 19.0 C/W on a 4-layer 95 x 95 mm test board and caps junction temperature at 125 C, with ambient rated 0 to 80 C. Mainline Linux has CPU cooling maps and, since 6.18, GPU OPPs and cooling. Router boards in metal cases (R2S, R1 Plus LTS) use the enclosure as the heatsink.
Sources: Datasheet Rev 1.4, Other v7.3-rc7
Gotchas
Clock claims disagree: datasheet Rev 1.4 says 1.3 GHz, Rev 1.2 said 1.4 GHz, Radxa says 1.3 GHz, and Pine64, FriendlyELEC, Orange Pi, Olimex and Firefly say 1.5 GHz; mainline stops at 1296 MHz. eMMC is HS200 only. The GPU shares VDD_LOGIC on the reference power trees, so GPU DVFS moves the logic rail. Rockchip's product page lists the package as BGA316; the datasheet says TFBGA395L.
Sources: Datasheet Rev 1.4, Datasheet Rev 1.2, Product brief, Other v7.3-rc7, Board schematic v3.0
Layout guides for the RK3328's interfaces
Public layout guidance for each interface this chip has, from vendors who publish it, plus our calculators.
DDR4
DDR4 uses pseudo open-drain data signaling and needs a VPP supply, with command/address routed fly-by or as a balanced tree depending on device count. TI AM62x uses 40 ohm single-ended and 80 ohm differential; AMD Versal uses 50 and 90 ohm, relaxed under the BGA. Match data to strobe per byte and command/address to clock.
- AM62x, AM62Lx DDR Board Design and Layout GuidelinesTexas Instruments, SPRAD06, C, 2025
- Versal Adaptive SoC PCB Design User Guide: PCB Routing Guidelines for DDR4 InterfacesAMD, UG863, 1.12, 2026
- SL1640 General PCB Design and DDR4 & LPDDR4(x) Interface Layout GuidelinesSynaptics, PN 506-001529-01, D
- PCB Design Guidelines (HSSI, EMIF, MIPI, True Differential, PDN) User Guide: Agilex 5 FPGAs and SoCsAltera, 821801, 2026
- DDR length matching calculatorGroundplane calculator
- Via current calculatorGroundplane calculator
DDR3 / DDR3L
Fly-by command/address with termination at the end of the chain, point-to-point data lanes matched to their strobe, and a clean VREF. ST recommends 55 ohm single-ended and 100 ohm differential for DDR3 and DDR3L on STM32MP1 boards, and shows that a 4-layer board is possible with strict layer allocation.
- STM32MP1 Series DDR memory routing guidelinesSTMicroelectronics, AN5122, 3, 2019
- DDR3 Design Requirements for KeyStone DevicesTexas Instruments, SPRABI1, D, 2022
- SL2610 General PCB Design and DDR3L/DDR4 & LPDDR4(x) Interface Layout GuidelinesSynaptics, PN 506-001629-01, A, 2025
- DDR length matching calculatorGroundplane calculator
LPDDR3
Point-to-point and normally unterminated, with command/address matched to the clock and each byte matched to its strobe. ST gives the same targets for LPDDR3 as for DDR3: 55 ohm single-ended and 100 ohm differential. Few current public guides cover LPDDR3, so treat the SoC vendor's reference layout as the stronger source.
- STM32MP1 Series DDR memory routing guidelinesSTMicroelectronics, AN5122, 3, 2019
- DDR length matching calculatorGroundplane calculator
eMMC
A single-ended bus: CLK, CMD, DAT0 to DAT7 and, for HS400, the data strobe. TI and Synaptics both route it at 50 ohm single-ended, match the group, and keep stubs short; Synaptics places a 22 or 33 ohm series resistor on CLK and STRB. At HS400 TI also checks the eMMC I/O supply impedance, not just the traces.
- AM62Px eMMC HS400 Board Design and Simulation GuidelinesTexas Instruments, SPRADP5, A, 2026
- Astra Machina Foundation Series eMMC ConfigurationSynaptics, PN 506-001594-01, D
- i.MX28 Layout and Design GuidelinesNXP (Freescale), AN4215, 0, 2010
SD card / SDIO
Single-ended CLK, CMD and four data lines over a solid ground plane, at constant trace width and matched length. NXP asks for clock-to-neighbor spacing greater than twice the trace height above the plane and 1.5 times for data and CMD, with 45 degree bends. UHS modes switch the I/O to 1.8 V, so a level translator often sits next to the socket.
- NVT4557/NVT4558/NVT4858 voltage-level translator layout guidelineNXP, AN13158, 1.1, 2022
- i.MX28 Layout and Design GuidelinesNXP (Freescale), AN4215, 0, 2010
- SD Physical Layer Simplified SpecificationSD Association, 9.10, 2023
PCIe
AC-coupled differential lanes routed with no stubs, minimal vias and back-drilled or blind vias where speed demands, with lane-to-lane skew handled by the receiver. Targets differ by guide: TI Jacinto 7 uses 85 ohm differential for lanes and 100 ohm for the reference clock, while TI's earlier SoC guide tabulates 100 ohm and, for some devices, 95 ohm. Match the target to your connector and stackup.
- Jacinto7 AM6x, TDA4x, and DRA8x High-Speed Interface Design GuidelinesTexas Instruments, SPRACP4, A, 2024
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
USB 3.x
SuperSpeed TX and RX pairs are routed at 90 ohm differential in all three TI guides (SPRAAR7 lists 95 ohm for some devices), with AC coupling capacitors on TX, symmetric pad and via placement, and matched via counts within each pair. Keep the pairs away from the USB 2.0 pair and other aggressors, and place ESD at the connector.
- High-Speed Layout Guidelines for Signal Conditioners and USB HubsTexas Instruments, SLLA414, A, 2026
- Jacinto7 AM6x, TDA4x, and DRA8x High-Speed Interface Design GuidelinesTexas Instruments, SPRACP4, A, 2024
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
USB 2.0
One D+/D- pair at 90 ohm differential, routed in parallel for its whole length with minimal deviations at the connector and package. NXP keeps clocks and periodic signals at least 50 mils away and other signals at least 20 mils away from the pair.
- High-Speed Layout Guidelines for Signal Conditioners and USB HubsTexas Instruments, SLLA414, A, 2026
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
- i.MX28 Layout and Design GuidelinesNXP (Freescale), AN4215, 0, 2010
HDMI
Four TMDS pairs (three data, one clock) at 100 ohm differential, as both TI guides state, with tight intra-pair matching and as few vias as possible between the SoC and the connector. HDMI also needs 5 V supply switching, DDC and CEC level handling, hot-plug detect and ESD at the connector.
- High-Speed Layout Guidelines for Signal Conditioners and USB HubsTexas Instruments, SLLA414, A, 2026
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
- TPD12S016 PCB Layout Guidelines for HDMI ESDTexas Instruments, SLLA324, 2012
MIPI CSI-2
Same D-PHY rules as DSI: 100 ohm differential lanes in both TI guides, with lane-to-lane skew bounded (40 ps in TI Jacinto 7). Size the lane count and lane rate from the sensor's output format before routing.
- Jacinto7 AM6x, TDA4x, and DRA8x High-Speed Interface Design GuidelinesTexas Instruments, SPRACP4, A, 2024
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
- PCB Design Guidelines (HSSI, EMIF, MIPI, True Differential, PDN) User Guide: Agilex 5 FPGAs and SoCsAltera, 821801, 2026
- MIPI CSI-2 bandwidth calculatorGroundplane calculator
Ethernet (RGMII / RMII)
TI routes MAC-to-PHY (MII family) traces at 50 ohm single-ended, under 6 inches, matched within 20 mils for gigabit, and the PHY-side MDI pairs at 100 ohm differential. RGMII also needs a 1.5 to 2.0 ns clock-to-data delay, added on the board or inside the MAC or PHY (RGMII-ID); decide which before layout so it is not applied twice.
- Ethernet PHY PCB Design Layout ChecklistTexas Instruments, SNLA387, 2021
- PCB Design Guideline for RGMII InterfaceRenesas, R01AN6272EJ0141, 1.41, 2026
- i.MX28 Layout and Design GuidelinesNXP (Freescale), AN4215, 0, 2010
Board-level design guides
Impedance and timing, power, thermal and ESD guidance that applies to any board around this chip.
Impedance and timing
Every high-speed interface on the board comes down to the same two numbers: the trace impedance your stackup actually gives, and the delay each trace adds. Set the stackup with your fab first, then route to its impedance table and match lengths in time, not millimeters, where the layers differ.
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
- PCB impedance calculatorGroundplane calculator
- PCB propagation delay calculatorGroundplane calculator
Power delivery
For each switching regulator, place and route the input capacitor first, keep the switching current loop small, and keep the switch node short. Give the SoC rails solid planes and decoupling at the balls, and size current-carrying copper and vias for the real load.
- Five steps to a great PCB layout for a step-down converterTexas Instruments, SLYT614, 2015
- AN-1149 Layout Guidelines for Switching Power SuppliesTexas Instruments, SNVA021, C, 2013
- AN-1229 SIMPLE SWITCHER PCB Layout GuidelinesTexas Instruments, SNVA054, C, 2013
- Buck converter calculatorGroundplane calculator
- LDO power dissipation calculatorGroundplane calculator
- PCB trace width calculatorGroundplane calculator
- Via current calculatorGroundplane calculator
Thermal
Theta-JA is measured on a JEDEC test board that carries most of the heat, so it does not transfer directly to a product board; use it to compare packages and use the psi metrics for estimates. Thermal vias under the package, copper area and copper thickness move the most heat into the board.
- Semiconductor and IC Package Thermal MetricsTexas Instruments, SPRA953, D, 2024
- AN-2020 Thermal Design By Insight, Not HindsightTexas Instruments, SNVA419, C, 2013
- Heatsink thermal resistance calculatorGroundplane calculator
- LDO power dissipation calculatorGroundplane calculator
ESD protection
Place the TVS as close to the connector as design rules allow, route from the connector to the TVS with no stub, and keep the protected IC further from the TVS than the TVS is from the connector. Choose parts by clamping performance and by capacitance low enough for the interface speed.
- ESD Protection Layout GuideTexas Instruments, SLVA680, A, 2022
- Reading and Understanding an ESD Protection Data SheetTexas Instruments, SLLA305, A
- TPD12S016 PCB Layout Guidelines for HDMI ESDTexas Instruments, SLLA324, 2012
- PCB conductor spacing calculator (IPC-2221)Groundplane calculator
Rockchip's hardware design guide
Rockchip's hardware design guide, EVB reference schematics and DDR templates come from Rockchip or an authorized agent, usually under NDA, or through your SoM vendor. We do not link copies circulating elsewhere. The vendor schematics and open designs on the Boards tab are real, shipped layouts on the RK3328 and the best public reference.
BSP, mainline and toolkits
| Area | Status | Links |
|---|---|---|
| Vendor BSP kernel | Rockchip's kernel tree carries RK3328 device trees on its 4.4, 4.19, 5.10 and 6.1 branches (EVB, box, ROCK64, ROC-RK3328-CC/PC, ROCK Pi E, NanoPi R2S, Beelink A1 and the RK3318 A95X Z2 on 6.1). Board vendors ship their own forks for Android and OpenWrt.Checked 2026-10-13 | |
| Mainline Linux | Well supported. rk3328.dtsi landed in 4.12 and ROCK64 in 4.14; Mali-450 node in 4.16 with the Lima driver in 5.2; VOP and HDMI display nodes in 4.20; Hantro VPU node in 5.4 (MPEG-2 and VP8 from 5.4, H.264 on VDPU2 from 5.15); USB 3.0 (dwc3) in 5.13; rkvdec node in 5.19 and rkvdec HEVC in 6.19 (tested on ROCK64); crypto in 6.2; GPU OPPs and cooling in 6.18. Mainline device trees exist for ROCK64, ROC-RK3328-CC/PC, ROCK Pi E, NanoPi R2S/R2S Plus/R2C/R2C Plus, Orange Pi R1 Plus/LTS, Beelink A1 and the RK3318 A95X Z2. Checked against v7.3-rc7.Checked 2026-10-13 | |
| U-Boot | Mainline U-Boot v2026.10 has defconfigs for evb, generic, ROCK64, ROC-RK3328-CC, ROCK Pi E (and V3), NanoPi R2S, R2S Plus, R2C, R2C Plus and Orange Pi R1 Plus/LTS. Rockchip's rkbin provides the DDR init, miniloader, USB plug and BL31/BL32 blobs under the rk322xh and rk3328 names.Checked 2026-10-13 | |
| NPU toolkit | Not applicable: the RK3328 has no NPU.Checked 2026-10-13 | |
| Video (MPP) | Rockchip MPP lists RK3328 with the RKVDEC (vdpu341) 4K decoder, VDPU2 with post-processor, VEPU2 (H.264/JPEG) and VEPU22 (H.265) encoders.Checked 2026-10-13 | |
| Android | Firefly documents Android 7.1 and 8.1 builds for ROC-RK3328-CC; Olimex publishes Android 8.1 images for RK3328-SOM; Pine64 publishes stock Android flashing guides and tools for ROCK64.Checked 2026-10-13 | |
| Distributions | Armbian lists ROCK64, NanoPi R2S, R2S Plus, R2C, ROCK Pi E, Renegade, Orange Pi R1 Plus/LTS and an RK3318 TV box image, all at Community support; ROCK64 has a Debian 13 image on kernel 6.18 (built 2026-10-08). OpenWrt 25.12 has ROCK Pi E images, and FriendlyELEC ships FriendlyWrt for the R2 boards. Olimex ships Armbian Debian 12 for RK3328-SOM.Checked 2026-10-13 | |
| Community | Pine64 forum and wiki for ROCK64, FriendlyELEC wiki for the R2 family, Radxa wiki for ROCK Pi E, Firefly forum for ROC-RK3328-CC/PC.Checked 2026-10-13 |
RK3328 on GitHub
Repositories for this chip: vendor code, mainline work, toolkits, distributions and open hardware.
- Vendor BSPfriendlyarm/sd-fuse_rk3328FriendlyELEC SD image builder for its RK3328 boards such as the NanoPi R2S; pairs with kernel-rockchip nanopi-r2-v6.1.y. Last commit 2026-09.
- Kernelrockchip-linux/kernelRockchip BSP kernel; RK3328 is supported from release-4.4 through develop-6.12. Last commit 2026-08.
- Kernelradxa/kernelRadxa BSP kernel; branch stable-4.4-rockpie supports the RK3328 ROCK Pi E. Last commit 2026-10.
- Kerneltorvalds/linuxMainline Linux has about 18 RK3328 device trees. Last commit 2026-10.
- Bootloaderrockchip-linux/rkbinDDR init and loaders; bin/rk33 holds the rk3328 DDR and miniloader binaries. Last commit 2026-08.
- Bootloaderu-boot/u-bootMainline U-Boot with generic-rk3328_defconfig and NanoPi R2S, R2C and ROCK64 configs. Last commit 2026-10.
- BootloaderTrustedFirmware-A/trusted-firmware-aRead-only mirror of TF-A; plat/rockchip/rk3328 is the open BL31 used by mainline builds. Last commit 2026-10.
- Mediarockchip-linux/mppMedia Process Platform; RK3328 is listed in the README for H.264, HEVC and VP9 decode. Last commit 2026-09.
- Distributionarmbian/buildArmbian build framework with RK3328 boards such as NanoPi R2S, ROCK64 and the MKS Klipper boards. Last commit 2026-10.
- DistributionMichaIng/DietPiMinimal Debian images with RK3328 builds for ROCK64, NanoPi R2S and NanoPi NEO3. Last commit 2026-10.
- Distributionopenwrt/openwrtOpenWrt rockchip/armv8 target with about ten RK3328 boards, the NanoPi R2S being the best known. Last commit 2026-10.
- DistributionLibreELEC/LibreELEC.tvKodi appliance OS with an RK3328 device under projects/Rockchip. Last commit 2026-10.
- Distributionayufan-rock64/linux-buildLong running ROCK64 image builds and scripts, a reference for RK3328 boot and kernel config. Last commit 2026-07.
- Open hardwareOLIMEX/RK3328-SOM-EBVOlimex evaluation carrier for its RK3328 SOM in KiCad, with schematic, gerbers and 3D models. Last commit 2021-05.
- Toolsrockchip-linux/rkdeveloptoolRockchip open source USB flashing tool for maskrom and loader mode, the Linux and macOS alternative to RKDevTool. Last commit 2025-03.
- Toolslinux-rockchip/rkflashtoolCommunity rkflashtool fork for reading and writing flash over USB in loader mode; its device table includes RK3328. Last commit 2025-09.
- Communitymakerbase-mks/MKS-PIMakerbase RK3328 Klipper host board with schematic PDFs and a ready Armbian image. Last commit 2022-12.
RK3328 system on modules
Any of these can sit on a carrier board we design.
| Module | Vendor | Connector | RAM | Design files | Price | Buy |
|---|---|---|---|---|---|---|
| Core-3328-JD4 | Firefly | SO-DIMM 260-pin gold finger, 0.5 mm pitch | 1 to 4 GB DDR3 | product specification with full pinout (V1.2, 2024-10-09); carrier MB-JD4-RK3328&PX30 | USD 199 (Firefly store, 20 in stock) | |
| RK3328-SOM | Olimex | Olimex-specific connectors, mates with RK3328-SOM-EVB | 1 or 2 GB DDR3L, 4 GB LPDDR3 | schematic PDF (Rev A, Rev B) | EUR 42.97 for 1 GB (Olimex, in stock) |
Every public RK3328 board
| Board | Vendor | Type | RAM | Notable I/O | Design files | Price | Buy |
|---|---|---|---|---|---|---|---|
| ROCK64 | Pine64 | SBC, Credit-card SBC, 85 x 56 mm | 1 to 4 GB LPDDR3 | 1x GbE (RTL8211F), 1x USB 3.0, 2x USB 2.0, HDMI 4K60, AV jack, eMMC socket, 16 MB SPI flash, Pi-2 and Pi-P5+ headers | schematic PDF (v2.0, v3.0), component placement PDFs, dimension drawing | USD 34.95 for 2 GB (Pine64 store, in stock) | |
| NanoPi R2S | FriendlyELEC | SBC, Router board, 55.6 x 52 mm | 1 GB DDR4 | 2x GbE (RGMII + USB 3.0 RTL8153B), 1x USB 2.0, microSD, micro-USB power | schematic PDF (V1.0, V1.1), PCB DXF | USD 27 bare board (FriendlyELEC store, bulk purchase only) | |
| NanoPi R2S Plus | FriendlyELEC | SBC, Router board, 58 x 58 mm | 1 GB DDR4 | 2x GbE, 32 GB eMMC, 2x USB 2.0, M.2 SDIO Wi-Fi slot, Maskrom button | schematic PDF, DXF | USD 66 with case (FriendlyELEC store, out of stock) | |
| NanoPi R2C | FriendlyELEC | SBC, Router board, 55.6 x 52 mm | 1 GB DDR4 | 2x GbE (YT8521S + RTL8153B), 1x USB 2.0, microSD | schematic PDF, PCB DXF | ||
| NanoPi R2C Plus | FriendlyELEC | SBC, Router board, 57.5 x 54.3 mm | 1 GB DDR4 | 2x GbE, 8 GB eMMC, 1x USB 2.0 | schematic PDF, DXF | ||
| NanoPi NEO3 | FriendlyELEC | SBC, 48 x 48 mm | 1 or 2 GB DDR4 | 1x GbE, 1x USB 3.0, 2x USB 2.0 on header, USB-C power | schematic PDF, PCB DXF | ||
| ROCK Pi E | Radxa | SBC, 65 x 56 mm, 40-pin header | 512 MB to 2 GB DDR3 or DDR4 | 1x GbE, 1x 10/100 (on-chip PHY), 1x USB 3.0, Optional Wi-Fi 5, BT 5, PoE with HAT, USB-C power | schematic and placement PDFs (v1.1, v1.2, v2.0), schematic PDF (v3.0), DXF, 3D STEP | ||
| ROC-RK3328-CC (Renegade) | Firefly / Libre Computer | SBC, Credit-card SBC, 40-pin header | 1, 2 or 4 GB DDR4 | 1x GbE, 1x USB 3.0, 2x USB 2.0, HDMI 2.0, eMMC module socket, IR receiver | schematic PDF and component placement PDF (V1.0, V1.3) | ||
| ROC-RK3328-PC | Firefly | SBC, Mini PC board, 90 x 60 mm | 1 to 4 GB DDR3 | 1x GbE, 1x USB 3.0, 1x USB 2.0, 1x OTG, HDMI 2.0, CVBS, eMMC 8 to 128 GB, USB-C power | component placement PDF only | USD 99 (Firefly store, 80 in stock) | |
| RK3328-SOM-EVB | Olimex | Carrier, Evaluation carrier for RK3328-SOM | GbE and 10/100 Ethernet, HDMI, USB 3.0, USB 2.0, OTG, microSD, eMMC flash module, UEXT | KiCad schematic and layout, Gerbers, BOM (CERN OHL 1.2) | EUR 32.95 (Olimex, in stock) | ||
| Orange Pi R1 Plus LTS | Orange Pi (Xunlong) | SBC, Router board, 56 x 57 mm | 1 GB LPDDR3 | 2x GbE, 1x USB 2.0, microSD, USB-C power, RK805 PMIC | schematic download listed (Google Drive folder) | ||
| Orange Pi R1 Plus | Orange Pi (Xunlong) | SBC, Router board, 56 x 57 mm | 1 GB DDR4 | 2x GbE, 1x USB 2.0, microSD, 16 MB SPI flash, USB-C power | schematic download listed (Google Drive folder) | ||
| MKS PI | Makerbase | SBC, Klipper host board | 1 GB DDR3 | Ethernet, HDMI, 3x USB, TS35 display header, eMMC module socket | schematic, placement, pinout and size PDFs, 3D STEP (GitHub, GPL-3.0 repo) | ||
| MKS SKIPR | Makerbase | SBC, 3D printer controller with RK3328 host and STM32F407 MCU | 1 GB DDR3 | Ethernet, HDMI, 3x USB, Stepper drivers on STM32F407 | schematic, placement, pinout and size PDFs, 3D STEP (GitHub, GPL-3.0 repo) |
Prices and links as checked on the dates in our data; the latest check on this page was 2026-10-13. Amazon links marked * are affiliate links; see our disclosure.
Boards with published design files
| Project | Author | Files | Tool | License |
|---|---|---|---|---|
| RK3328-SOM-EVB | Olimex | KiCad schematic (.sch), KiCad layout (.kicad_pcb), Gerbers and drill files (4 layers), BOM (.ods, .pdf), 3D models, schematic PDF | KiCad | CERN OHL 1.2 (hardware), CC BY-SA 3.0 (documentation) |
Buying the chip
Rockchip publishes no RK3328 price, MOQ or distributor list. The RK3318 was not found at any distributor. Firefly's Core-3328-JD4 specification is dated 2024-10-09 and Pine64, Olimex and Firefly still list RK3328 boards in stock, which suggests the chip is still shipping, but no Rockchip longevity statement was found.
- LCSC
- Stocks RK3328 (C2932939, TFBGA-395L 14 x 14) from 1 piece, 119 per tray: USD 8.14 at 1+, 7.75 at 10+, 7.50 at 30+, 7.30 at 119+; 26 in stock when checked. Not confirmed as an authorized Rockchip channel.
Datasheet, TRM and design documents
Linked where they are publicly hosted; we do not rehost Rockchip documents. These are third-party documents: we are not responsible for their accuracy, availability or confidentiality status. Disclosure.
- DatasheetRockchip RK3328 DatasheetRev 1.4 · 2020-03-10 · community mirror (rockchip.fr), not hosted by Rockchip · checked 2026-10-13
- DatasheetRockchip RK3328 DatasheetRev 1.2 · 2018-02-05 · hosted by Olimex · checked 2026-10-13
- DatasheetRockchip RK3328 DatasheetV1.1 · 2017-03-09 · hosted by FriendlyELEC wiki · checked 2026-10-13
- TRMRockchip RK3328 Technical Reference Manual, Part 1Rev 1.1 · 2017-03-20 · community mirror (rockchip.fr), not hosted by Rockchip · checked 2026-10-13
- PMICRockchip RK805 PMIC DatasheetV1.1 · 2016-09-21 · hosted by Pine64 · checked 2026-10-13
- Product briefRK3328 product pagehosted by Rockchip · checked 2026-10-13
- Board schematicPine64 ROCK64 schematic (RK805-1 power tree, LPDDR3)v3.0 · 2018-11-05 · hosted by Pine64 · checked 2026-10-13
- Board schematicPine64 ROCK64 schematicv2.0 · 2017-10-19 · hosted by Pine64 · checked 2026-10-13
- Board schematicFriendlyELEC NanoPi R2S schematic (DDR4, RTL8153B second port)V1.1 (2009) · hosted by FriendlyELEC wiki · checked 2026-10-13
- Board schematicFriendlyELEC NanoPi R2S Plus schematic (eMMC, maskrom button)2309 · hosted by FriendlyELEC wiki · checked 2026-10-13
- Board schematicFriendlyELEC NanoPi R2C schematic (YT8521S PHY)2107 · hosted by FriendlyELEC wiki · checked 2026-10-13
- Board schematicFriendlyELEC NanoPi R2C Plus schematic2109 · hosted by FriendlyELEC wiki · checked 2026-10-13
- Board schematicFriendlyELEC NanoPi NEO3 schematic2005 · hosted by FriendlyELEC wiki · checked 2026-10-13
- Board schematicRadxa ROCK Pi E schematicV3.0 · hosted by Radxa · checked 2026-10-13
- Board schematicRadxa ROCK Pi E schematicv1.2 · 2020-04-27 · hosted by Radxa · checked 2026-10-13
- Product briefRadxa ROCK Pi E Product BriefRevision 1.0 · hosted by Radxa · checked 2026-10-13
- Board schematicFirefly ROC-RK3328-CC schematicV1.3 · hosted by Firefly · checked 2026-10-13
- Board schematicOlimex RK3328-SOM schematic (DDR3L/LPDDR3, RK805-1)Rev B · hosted by Olimex · checked 2026-10-13
- OtherFirefly Core-3328-JD4 product specification with SO-DIMM 260 pinoutV1.2 · 2024-10-09 · hosted by Firefly · checked 2026-10-13
- Otherrk3328.dtsi, mainline Linux device treev7.3-rc7 · hosted by kernel.org · checked 2026-10-13
- Otherrk3318-a95x-z2.dts, mainline Linux device tree for an RK3318 TV boxv7.3-rc7 · hosted by kernel.org · checked 2026-10-13
- Otherrkbin: RK3328 (rk322xh) DDR init, miniloader, USB plug and BL31 binarieshosted by Rockchip (GitHub) · checked 2026-10-13
Questions about the RK3328
Not the RK3328 itself. We have designed and brought up boards on the Rockchip RV1106, RV1126, RV1126B, RK3566, RK3568, RK3576 and RK3588, and on the Allwinner T507 and A527/T527. The work carries over: power tree, DDR and high-speed layout, bring-up and the BSP, read against this chip's own datasheet.
Olimex hosts Rev 1.2 (2018-02-05) and FriendlyELEC hosts V1.1 (2017-03-09). The newest revision, Rev 1.4 (2020-03-10), and TRM Part 1 Rev 1.1 are only on the rockchip.fr community mirror. Rockchip itself hosts only a product page; its old opensource.rock-chips.com wiki is offline.
Datasheet Rev 1.4 says 1.3 GHz and Rev 1.2 said 1.4 GHz. Most board vendors advertise 1.5 GHz, which comes from vendor kernels. Mainline Linux defines operating points up to 1296 MHz.
No. The datasheet lists no PCIe controller. High-speed expansion is one USB 3.0 host port, which is why RK3328 routers such as the NanoPi R2S add their second Gigabit port with a USB 3.0 Ethernet chip.
Yes, and more completely than most Rockchip parts: CPU since 4.12, display and HDMI since 4.20, Mali-450 via Lima since 5.2, USB 3.0 since 5.13, Hantro and rkvdec video decode since 5.4 and 5.19, and rkvdec HEVC since 6.19. Mainline U-Boot covers ROCK64, ROCK Pi E, ROC-RK3328-CC, the NanoPi R2 family and Orange Pi R1 Plus.
The RK3528 targets the same TV box and router market with a PCIe 2.1 x1 or USB 3.0 combo lane, LPDDR4/4X and DDR4 support, HDMI 2.0b and eMMC HS400. The RK3328 has a far more mature mainline stack and a large base of open schematics. Choose the RK3328 when mainline maturity and cost matter more than PCIe or LPDDR4.
Every public board found uses the Rockchip RK805-1, with buck 1 on VDD_LOGIC, buck 2 on VDD_ARM, buck 3 on DDR and buck 4 on 3.3 V I/O. Pine64 hosts the RK805 datasheet V1.1.
Related chips and reading
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Links and facts on this page checked 2026-10-13. Spotted something out of date? Tell us through the contact form.
Compiled from publicly available sources: datasheets, technical reference manuals, vendor product pages, schematics and source code published by their owners and third parties. We link to documents where others host them and do not host, endorse or vouch for them. Everything on these pages, including our own specs, summaries, block diagrams, comparisons, calculators and design notes, is for reference only and may contain errors or be out of date. It is provided as is, and Groundplane is not responsible for errors in it, for third-party documents, or for any design, board or decision based on it. Always check the manufacturer's current datasheet, reference manual and design guidance before you design a board. Rockchip, Allwinner, Raspberry Pi and other product names are trademarks of their owners; we are not affiliated with any of them. See our disclosure.