RK3399
Dual Cortex-A72 plus quad Cortex-A53 from 2016 with some of the most complete mainline Linux support of any Rockchip SoC (fully open boot chain, Panfrost GPU, hardware decode upstream), but no NPU, a 4 GB DRAM ceiling and PCIe limited to Gen1 x4.
- CPU
- 2x A72 1.8 GHz + 4x A53 1.4 GHz
- GPU
- Mali-T860MP4
- NPU
- None (RK3399Pro: separate page)
- Video
- 4K60 H.265/VP9, 4K30 H.264 decode; 1080p30 H.264 encode
- PCIe
- PCIe x4 at 2.5 GT/s (Gen1)
What the RK3399 is for
Right for
- Products that must run an upstream kernel and an open boot chain: TF-A, U-Boot DRAM init, Panfrost, Hantro and rkvdec decode and the rkisp1 ISP are all mainline, with 42 RK3399-family board device trees in Linux 7.2
- Dual-display or DisplayPort designs: HDMI 2.0, eDP 1.3, dual MIPI DSI and DP 1.2 over USB Type-C alt mode from two display controllers
- Small NAS and routers needing a x4 PCIe link for a SATA controller or NIC (ROCKPro64, Helios64, NanoPi R4S use exactly this)
- Laptops and tablets: the SoC family behind the Gru Chromebooks (OP1 bin in mainline) and the Pinebook Pro, with two USB 3.0 Type-C PHYs and USB PD signaling
- Long-lived products where a very large public schematic base (Pine64, Radxa, FriendlyELEC, Khadas all publish) shortens bring-up
Wrong for
- AI inference: no NPU on RK3399; the RK3399Pro adds one, but its toolkit (RKNN-Toolkit v1) last released in 2023 and RKNN-Toolkit2 does not support it
- Anything needing PCIe Gen2 or faster: the datasheet specifies 2.5 GT/s and Rockchip asks upstream not to run 5 GT/s
- More than 4 GB DRAM: the controller has a 4 GB total address space
- Video encode above 1080p30 or any H.265 encode
- New designs that need low per-board cost or current CPU performance: RK3566/RK3568 are cheaper and RK3576/RK3588 are faster
Cost and constraints
- FCBGA828, 21 x 21 mm, 0.65 mm pitch; the three vendor schematics we checked (ROCKPro64, ROCK 4B+, NanoPi R4S) all pair it with RK808-D plus two Silergy SYR837/SYR838 bucks for the A72 cluster and GPU rails
- Bare chip USD 22.47 at LCSC in single units (54 in stock, 2026-10-13), commercial 0 to 80 C ambient only for the base part
- Two DRAM channels, 16 or 32 bits each: LPDDR4 boards route 64 bits of DRAM, which drives layer count
- Type-C ports need an external CC/PD controller (the RockPro64 uses a FUSB302B) for orientation and alt mode
Inside the RK3399
Drawn by Groundplane from the datasheet rev 2.1. Not Rockchip artwork.
- DDR3/3L, LPDDR3, LPDDR4
- 2x 32-bit channels, 4 GB max
- eMMC 5.1 HS400
- 2x SD 3.0 / SDIO 3.0
- SPI NOR/NAND
- 2x Cortex-A72, 1 MB L2
- 4x Cortex-A53, 512 KB L2
- CCI-500 coherent interconnect
- Mali-T860MP4, 256 KB L2
- 2D engine (RGA)
- 4K60 H.265/VP9 decode
- 4K30 H.264 decode
- 1080p30 H.264/VP8 encode
- JPEG codec, IEP
- Dual ISP, 14 MP each
- VOP_BIG, 4096x2160
- VOP_LIT, 2560x1600
- Dual-channel DDR controller
- 200 KB SRAM, 32 KB boot ROM
- TrustZone, crypto engine
- TRNG, 2x 1 Kbit eFuse
- 2x Cortex-M0
- PMU, 6 voltage domains
- 8 PLLs, 24 MHz oscillator
- TSADC, SARADC, DMAC x2
- PCIe 2.1 x4 at 2.5 GT/s
- 2x Type-C: USB 3.0 + DP alt
- 2x USB 2.0 host
- GMAC RGMII
- HDMI 2.0
- eDP 1.3 4-lane
- 2x MIPI DSI 4-lane
- 2x MIPI CSI 4-lane
- 5x UART, 6x SPI, 9x I2C
- 3x I2S, SPDIF
- 6-ch SARADC, 4x PWM
Read from the documents
Each value names the document it was read from.
| CPU | 2x Cortex-A72 up to 1.8 GHz (48 KB L1 I, 32 KB L1 D, 1 MB L2) + 4x Cortex-A53 up to 1.4 GHz (32/32 KB L1, 512 KB L2); CCI-500; ARMv8 crypto extensions; separate DVFS rails per cluster | Datasheet Rev 2.1, 1.2.1, Table 3-2 |
|---|---|---|
| MCU | 2x Cortex-M0 for power management and system tasks | Datasheet Rev 2.1, 1.2.5 |
| GPU | Mali-T860MP4, 4 shader cores, 256 KB L2, up to 800 MHz; OpenGL ES 1.1 to 3.2, OpenCL 1.2, DirectX 11.1 | Datasheet Rev 2.1, 1.2.9, Table 3-2 |
| NPU | None on RK3399, RK3399K or RK3399-T | Datasheet Rev 2.1, 1.2 |
| Video decode | H.265 Main/Main10 and VP9 Profile 0 up to 4096x2304@60; H.264 up to High10 L5.1 at 4Kx2K@30; MPEG-1/2/4, VC-1, MVC up to 1080p60 | Datasheet Rev 2.1, 1.2.6 |
| Video encode | H.264 up to High profile L4.1, MVC and VP8, 1920x1080@30, I and P slices only; JPEG encode to 8192x8192 | Datasheet Rev 2.1, 1.2.6, 1.2.7 |
| Memory | DDR3/DDR3L-1866, LPDDR3-1866, LPDDR4; 2 channels of 16 or 32 bits, 2 ranks per channel, 4 GB total address space | Datasheet Rev 2.1, 1.2.4 |
| Storage | eMMC 5.1 (HS400, HS200), 2x SD 3.0/MMC 4.51/SDIO 3.0 (4-bit), SPI NOR/NAND; boot from SPI, eMMC or SD | Datasheet Rev 2.1, 1.2.3, 1.2.4 |
| Display | Two display controllers: VOP_BIG to 4096x2160 out, VOP_LIT to 2560x1600. HDMI 2.0 (4K60, HDCP 1.4/2.2), eDP 1.3 4-lane at 2.7 Gbps, DP 1.2 (4K60, one controller shared by both Type-C ports), 2x MIPI DSI 4-lane (2560x1600@60 dual-channel) | Datasheet Rev 2.1, 1.2.10 to 1.2.14 |
| Camera | Two MIPI CSI-2 4-lane inputs (one PHY shared with DSI); two ISPs, 14 MP max input each; 12-bit DVP | Datasheet Rev 2.1, 1.2.10, 1.2.12 |
| PCIe | One PCIe 2.1 port, x4 (or fewer lanes), 2.5 GT/s per lane, Root Complex | Datasheet Rev 2.1, 1.2.17 |
| USB | 2x USB 3.0 OTG (5 Gbps) on two Type-C PHYs with DP 1.2 alt mode and USB PD 2.0 signaling on CC; 2x USB 2.0 host | Datasheet Rev 2.1, 1.2.15, 1.2.17 |
| Ethernet | 1x GMAC, RGMII 10/100/1000 or RMII 10/100 | Datasheet Rev 2.1, 1.2.17 |
| Other I/O | 5x UART, 6x SPI, 9x I2C, 4x PWM, 3x I2S/PCM (I2S0 8-ch and I2S1 2-ch exposed, I2S2 internal to HDMI and DP), SPDIF, 6-ch 10-bit SARADC, 122 GPIO | Datasheet Rev 2.1, 1.2.16 to 1.2.18 |
| Security | TrustZone, dual-channel crypto engine (AES, DES/3DES, SHA-1/256, MD5, PKA to 2048-bit), TRNG, 2x 1024-bit eFuse, secure boot | Datasheet Rev 2.1, 1.2.5, 1.2.18 |
| Package | FCBGA828, 21 x 21 mm body, 0.65 mm ball pitch, 0.35 mm balls | Datasheet Rev 2.1, 1.2.18, 2.1 |
| Temperature | RK3399 0 to 80 C ambient; Tj max 125 C; theta JA 12.39 C/W, theta JB 7.7 C/W, theta JC 0.38 C/W (6-layer JEDEC board) | Datasheet Rev 2.1, Table 3-1, 3-2, 4-1 |
Variants
| RK3399 | Base part, FCBGA828. A72 1.8 GHz, A53 1.4 GHz, GPU 800 MHz, 0 to 80 C ambient. | Datasheet Rev 2.1 |
|---|---|---|
| RK3399K | Same package and features. A72 2.0 GHz and A53 1.6 GHz between 0 and 80 C; 1.8 GHz / 1.4 GHz and GPU 600 MHz between -20 and 0 C or 80 and 85 C. Rated -20 to 85 C ambient. Ordering table lists it for commercial application. | Datasheet Rev 2.1 |
| RK3399-T | Lower-clock part (Rev 1.0 datasheet, 2021): A72 1.5 GHz, A53 1.0 GHz, GPU 600 MHz, with lower core voltages (BIGCPU_VDD max 1.15 V). PCIe is absent from its feature list and electrical tables. 0 to 80 C ambient, same FCBGA828. Used on Radxa ROCK 4C+ and ROCK 4SE (mainline rk3399-t.dtsi). | Datasheet Rev 1.0 |
| RK3399Pro (could be its own page) | Not pin compatible: FCBGA1372, 27 x 27 mm. Same A72 1.8 GHz / A53 1.4 GHz cluster and Mali-T860MP4, plus an NPU (1920 INT8, 192 INT16 or 64 FP16 MACs per cycle, 512 KB buffer, up to 800 MHz, own DVFS domain) with a dedicated 32-bit DDR3/DDR3L/LPDDR2/LPDDR3/DDR4 interface of up to 2 GB. USB 3.0 DRD and USB host 0 are reserved for internal use, leaving one Type-C/USB 3.0 port for the user. The Rockchip product page rates the NPU at up to 3.0 TOPS; the datasheet gives no TOPS figure. | Datasheet Rev 1.0 |
What to watch when you design with it
Size a heatsink for the RK3399 with its datasheet θJC and Tj max filled in, and download the STEP.
Power and PMIC
Every vendor schematic we opened (ROCKPro64 v2.1, ROCK 4B+ v1.73, NanoPi R4S) uses an RK808-D PMIC plus two Silergy I2C bucks, SYR837PKC and SYR838PKC, for VDD_CPU_B (A72 cluster) and VDD_GPU. The RK808 has four bucks (two at 5 A, 3 A, 2.5 A), eight LDOs and two switches, 2.7 to 5.5 V input, in a 7 x 7 mm QFN68. Datasheet operating range: A72 rail 0.80 to 1.25 V, A53 rail 0.80 to 1.20 V, GPU 0.80 to 1.20 V, logic 0.8 to 1.0 V.
Sources: Datasheet Rev 2.1, PMIC V0.8, files.pine64.org, dl.radxa.com
DDR
Two channels of 16 or 32 bits with up to two ranks each, 4 GB total. DDR3/DDR3L/LPDDR3 rated to 1866; the datasheet gives no LPDDR4 rate. Rockchip's rkbin publishes RK3399 DDR init blobs at 666, 800 and 933 MHz (v1.30). Mainline U-Boot has its own open RK3399 DRAM driver (DDR3/LPDDR3 since v2017.05, LPDDR4 by v2019.10), so the boot chain can be built without Rockchip binaries. Only one DRAM type per design.
Sources: Datasheet Rev 2.1, github.com, github.com
PCIe
Specify the link as Gen1. The datasheet gives 2.5 GT/s per lane. Mainline rk3399.dtsi has set max-link-speed = <1> since 2017, citing a TRM erratum, and in November 2025 Rockchip's Shawn Lin asked upstream to drop Helios64's Gen2 override, warning of possible catastrophic failures at 5 GT/s; the override was removed in 6.19. The RK3399-T datasheet does not list PCIe at all.
Sources: Datasheet Rev 2.1, Datasheet Rev 1.0, github.com, github.com
USB Type-C and DisplayPort
The two Type-C PHYs carry USB 3.0 and DP 1.2 alt mode, but there is only one DP controller, shared between them. Orientation and CC handling need an external controller: the ROCKPro64 I2C map shows a FUSB302B next to the RK808.
Sources: Datasheet Rev 2.1, files.pine64.org
Boot and maskrom
The boot ROM tries SPI NOR, then SPI NAND, then eMMC, then SD; if none has a valid ID block it enumerates the USB OTG port and waits for a DDR init image and loader (maskrom). The device shows as USB ID 2207:330c. Bring the OTG port (Type-C0 on most boards) out for recovery, and provide a way to disable eMMC or SPI boot, such as a maskrom button or jumper.
Sources: TRM Rev 1.4, docs.u-boot.org
Thermal
Theta JA is 12.39 C/W on a 6-layer JEDEC board and Tj max is 125 C. The datasheet notes that the reference software limits the chip to about 85 C, so sustained A72 load without a heatsink throttles. The base RK3399 is rated only to 80 C ambient; use RK3399K for -20 to 85 C.
Sources: Datasheet Rev 2.1
Layout
The ROCKPro64 v2.1 schematic annotates impedance targets on its nets: 90 ohm +/-10% differential, 100 ohm +/-10% differential and 50 ohm +/-10% single-ended (eMMC data). The datasheet gives no routing rules.
Sources: Datasheet Rev 2.1, files.pine64.org
Layout guides for the RK3399's interfaces
Public layout guidance for each interface this chip has, from vendors who publish it, plus our calculators.
LPDDR4
Point-to-point routing; TI notes that on-die termination on both ends means no board termination is needed. Byte lanes length-matched to their strobe and command/address matched to the clock, all over a solid reference plane. Impedance targets differ by vendor: TI AM62x and ADI EE-480 use 40 ohm single-ended and 80 ohm differential, Synaptics SL1680 uses 50 and 85 ohm, AMD Versal 45 and 82 ohm. Use the SoC vendor's own target and simulate.
- AM62x, AM62Lx DDR Board Design and Layout GuidelinesTexas Instruments, SPRAD06, C, 2025
- AM62Ax, AM62Px, AM62Dx LPDDR4 Board Design and Layout GuidelinesTexas Instruments, SPRAD66, B, 2024
- ADSP-2184x/ADSP-SC84x LPDDR4 Board Design GuidelinesAnalog Devices, EE-480, 1, 2026
- SL1680 General PCB Design and LPDDR4 & LPDDR4(x) Interface Layout GuidelinesSynaptics, PN 506-001390-01, E
- DDR length matching calculatorGroundplane calculator
DDR4
DDR4 uses pseudo open-drain data signaling and needs a VPP supply, with command/address routed fly-by or as a balanced tree depending on device count. TI AM62x uses 40 ohm single-ended and 80 ohm differential; AMD Versal uses 50 and 90 ohm, relaxed under the BGA. Match data to strobe per byte and command/address to clock.
- AM62x, AM62Lx DDR Board Design and Layout GuidelinesTexas Instruments, SPRAD06, C, 2025
- Versal Adaptive SoC PCB Design User Guide: PCB Routing Guidelines for DDR4 InterfacesAMD, UG863, 1.12, 2026
- SL1640 General PCB Design and DDR4 & LPDDR4(x) Interface Layout GuidelinesSynaptics, PN 506-001529-01, D
- PCB Design Guidelines (HSSI, EMIF, MIPI, True Differential, PDN) User Guide: Agilex 5 FPGAs and SoCsAltera, 821801, 2026
- DDR length matching calculatorGroundplane calculator
- Via current calculatorGroundplane calculator
DDR3 / DDR3L
Fly-by command/address with termination at the end of the chain, point-to-point data lanes matched to their strobe, and a clean VREF. ST recommends 55 ohm single-ended and 100 ohm differential for DDR3 and DDR3L on STM32MP1 boards, and shows that a 4-layer board is possible with strict layer allocation.
- STM32MP1 Series DDR memory routing guidelinesSTMicroelectronics, AN5122, 3, 2019
- DDR3 Design Requirements for KeyStone DevicesTexas Instruments, SPRABI1, D, 2022
- SL2610 General PCB Design and DDR3L/DDR4 & LPDDR4(x) Interface Layout GuidelinesSynaptics, PN 506-001629-01, A, 2025
- DDR length matching calculatorGroundplane calculator
LPDDR3
Point-to-point and normally unterminated, with command/address matched to the clock and each byte matched to its strobe. ST gives the same targets for LPDDR3 as for DDR3: 55 ohm single-ended and 100 ohm differential. Few current public guides cover LPDDR3, so treat the SoC vendor's reference layout as the stronger source.
- STM32MP1 Series DDR memory routing guidelinesSTMicroelectronics, AN5122, 3, 2019
- DDR length matching calculatorGroundplane calculator
eMMC
A single-ended bus: CLK, CMD, DAT0 to DAT7 and, for HS400, the data strobe. TI and Synaptics both route it at 50 ohm single-ended, match the group, and keep stubs short; Synaptics places a 22 or 33 ohm series resistor on CLK and STRB. At HS400 TI also checks the eMMC I/O supply impedance, not just the traces.
- AM62Px eMMC HS400 Board Design and Simulation GuidelinesTexas Instruments, SPRADP5, A, 2026
- Astra Machina Foundation Series eMMC ConfigurationSynaptics, PN 506-001594-01, D
- i.MX28 Layout and Design GuidelinesNXP (Freescale), AN4215, 0, 2010
SD card / SDIO
Single-ended CLK, CMD and four data lines over a solid ground plane, at constant trace width and matched length. NXP asks for clock-to-neighbor spacing greater than twice the trace height above the plane and 1.5 times for data and CMD, with 45 degree bends. UHS modes switch the I/O to 1.8 V, so a level translator often sits next to the socket.
- NVT4557/NVT4558/NVT4858 voltage-level translator layout guidelineNXP, AN13158, 1.1, 2022
- i.MX28 Layout and Design GuidelinesNXP (Freescale), AN4215, 0, 2010
- SD Physical Layer Simplified SpecificationSD Association, 9.10, 2023
PCIe
AC-coupled differential lanes routed with no stubs, minimal vias and back-drilled or blind vias where speed demands, with lane-to-lane skew handled by the receiver. Targets differ by guide: TI Jacinto 7 uses 85 ohm differential for lanes and 100 ohm for the reference clock, while TI's earlier SoC guide tabulates 100 ohm and, for some devices, 95 ohm. Match the target to your connector and stackup.
- Jacinto7 AM6x, TDA4x, and DRA8x High-Speed Interface Design GuidelinesTexas Instruments, SPRACP4, A, 2024
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
USB 3.x
SuperSpeed TX and RX pairs are routed at 90 ohm differential in all three TI guides (SPRAAR7 lists 95 ohm for some devices), with AC coupling capacitors on TX, symmetric pad and via placement, and matched via counts within each pair. Keep the pairs away from the USB 2.0 pair and other aggressors, and place ESD at the connector.
- High-Speed Layout Guidelines for Signal Conditioners and USB HubsTexas Instruments, SLLA414, A, 2026
- Jacinto7 AM6x, TDA4x, and DRA8x High-Speed Interface Design GuidelinesTexas Instruments, SPRACP4, A, 2024
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
USB 2.0
One D+/D- pair at 90 ohm differential, routed in parallel for its whole length with minimal deviations at the connector and package. NXP keeps clocks and periodic signals at least 50 mils away and other signals at least 20 mils away from the pair.
- High-Speed Layout Guidelines for Signal Conditioners and USB HubsTexas Instruments, SLLA414, A, 2026
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
- i.MX28 Layout and Design GuidelinesNXP (Freescale), AN4215, 0, 2010
HDMI
Four TMDS pairs (three data, one clock) at 100 ohm differential, as both TI guides state, with tight intra-pair matching and as few vias as possible between the SoC and the connector. HDMI also needs 5 V supply switching, DDC and CEC level handling, hot-plug detect and ESD at the connector.
- High-Speed Layout Guidelines for Signal Conditioners and USB HubsTexas Instruments, SLLA414, A, 2026
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
- TPD12S016 PCB Layout Guidelines for HDMI ESDTexas Instruments, SLLA324, 2012
DisplayPort / eDP
Main-link lanes are routed at 100 ohm differential in both TI guides, with no stubs and few vias; TI Jacinto 7 allows 2 vias per trace. When DisplayPort shares a USB-C connector through alt mode, the lanes run through the Type-C mux and the SuperSpeed rules apply to the shared path.
- High-Speed Layout Guidelines for Signal Conditioners and USB HubsTexas Instruments, SLLA414, A, 2026
- Jacinto7 AM6x, TDA4x, and DRA8x High-Speed Interface Design GuidelinesTexas Instruments, SPRACP4, A, 2024
MIPI DSI
MIPI D-PHY clock and data lanes are routed as 100 ohm differential pairs over a solid reference; TI Jacinto 7 allows no stubs, 2 vias per trace and 40 ps lane-to-lane skew. Connectors and flex cables to the panel are usually the largest discontinuity, so keep the board segment short and clean.
- Jacinto7 AM6x, TDA4x, and DRA8x High-Speed Interface Design GuidelinesTexas Instruments, SPRACP4, A, 2024
- PCB Design Guidelines (HSSI, EMIF, MIPI, True Differential, PDN) User Guide: Agilex 5 FPGAs and SoCsAltera, 821801, 2026
MIPI CSI-2
Same D-PHY rules as DSI: 100 ohm differential lanes in both TI guides, with lane-to-lane skew bounded (40 ps in TI Jacinto 7). Size the lane count and lane rate from the sensor's output format before routing.
- Jacinto7 AM6x, TDA4x, and DRA8x High-Speed Interface Design GuidelinesTexas Instruments, SPRACP4, A, 2024
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
- PCB Design Guidelines (HSSI, EMIF, MIPI, True Differential, PDN) User Guide: Agilex 5 FPGAs and SoCsAltera, 821801, 2026
- MIPI CSI-2 bandwidth calculatorGroundplane calculator
Ethernet (RGMII / RMII)
TI routes MAC-to-PHY (MII family) traces at 50 ohm single-ended, under 6 inches, matched within 20 mils for gigabit, and the PHY-side MDI pairs at 100 ohm differential. RGMII also needs a 1.5 to 2.0 ns clock-to-data delay, added on the board or inside the MAC or PHY (RGMII-ID); decide which before layout so it is not applied twice.
- Ethernet PHY PCB Design Layout ChecklistTexas Instruments, SNLA387, 2021
- PCB Design Guideline for RGMII InterfaceRenesas, R01AN6272EJ0141, 1.41, 2026
- i.MX28 Layout and Design GuidelinesNXP (Freescale), AN4215, 0, 2010
Board-level design guides
Impedance and timing, power, thermal and ESD guidance that applies to any board around this chip.
Impedance and timing
Every high-speed interface on the board comes down to the same two numbers: the trace impedance your stackup actually gives, and the delay each trace adds. Set the stackup with your fab first, then route to its impedance table and match lengths in time, not millimeters, where the layers differ.
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
- PCB impedance calculatorGroundplane calculator
- PCB propagation delay calculatorGroundplane calculator
Power delivery
For each switching regulator, place and route the input capacitor first, keep the switching current loop small, and keep the switch node short. Give the SoC rails solid planes and decoupling at the balls, and size current-carrying copper and vias for the real load.
- Five steps to a great PCB layout for a step-down converterTexas Instruments, SLYT614, 2015
- AN-1149 Layout Guidelines for Switching Power SuppliesTexas Instruments, SNVA021, C, 2013
- AN-1229 SIMPLE SWITCHER PCB Layout GuidelinesTexas Instruments, SNVA054, C, 2013
- Buck converter calculatorGroundplane calculator
- LDO power dissipation calculatorGroundplane calculator
- PCB trace width calculatorGroundplane calculator
- Via current calculatorGroundplane calculator
Thermal
Theta-JA is measured on a JEDEC test board that carries most of the heat, so it does not transfer directly to a product board; use it to compare packages and use the psi metrics for estimates. Thermal vias under the package, copper area and copper thickness move the most heat into the board.
- Semiconductor and IC Package Thermal MetricsTexas Instruments, SPRA953, D, 2024
- AN-2020 Thermal Design By Insight, Not HindsightTexas Instruments, SNVA419, C, 2013
- Heatsink thermal resistance calculatorGroundplane calculator
- LDO power dissipation calculatorGroundplane calculator
ESD protection
Place the TVS as close to the connector as design rules allow, route from the connector to the TVS with no stub, and keep the protected IC further from the TVS than the TVS is from the connector. Choose parts by clamping performance and by capacitance low enough for the interface speed.
- ESD Protection Layout GuideTexas Instruments, SLVA680, A, 2022
- Reading and Understanding an ESD Protection Data SheetTexas Instruments, SLLA305, A
- TPD12S016 PCB Layout Guidelines for HDMI ESDTexas Instruments, SLLA324, 2012
- PCB conductor spacing calculator (IPC-2221)Groundplane calculator
Rockchip's hardware design guide
Rockchip's hardware design guide, EVB reference schematics and DDR templates come from Rockchip or an authorized agent, usually under NDA, or through your SoM vendor. We do not link copies circulating elsewhere. The vendor schematics and open designs on the Boards tab are real, shipped layouts on the RK3399 and the best public reference.
BSP, mainline and toolkits
| Area | Status | Links |
|---|---|---|
| Vendor BSP kernel | Rockchip kernel trees carry RK3399 (including the rk3399-evb-ind boards) on develop-4.4, develop-4.19, develop-5.10 and develop-6.1 (default branch). FriendlyELEC ships 4.19 BSP images alongside 6.1 and 6.6 based images for its RK3399 boards.Checked 2026-10-13 | |
| Mainline Linux | rk3399.dtsi landed in 4.7 (no display nodes yet). eDP driver support (analogix_dp) 4.8. PCIe host and Type-C PHY 4.9. DisplayPort driver (cdn-dp) 4.11, its devicetree node 4.17. Gru Kevin Chromebook 4.12. MIPI DSI driver support 4.12, with eDP, VOP, HDMI, GPU and DSI nodes in rk3399.dtsi from 4.14; dual-channel DSI 5.0. Hantro VPU from 5.0 in staging (on RK3399 today: JPEG encode, MPEG-2 and VP8 decode). Panfrost GPU 5.2. rkvdec H.264 4K decode 5.8 (staging), VP9 5.17, destaged in 6.17, HEVC 6.19. rkisp1 ISP 5.6 (staging), destaged 5.11. OP1 OPP table 4.13, RK3399-T OPP table 6.1, both split into rk3399-op1.dtsi and rk3399-t.dtsi in 6.12. Linux 7.2 carries 42 RK3399-family board device trees (43 in 7.3-rc7). Not upstream as of 7.2: H.264 hardware encode (mainline Hantro has only the JPEG encoder for RK3399).Checked 2026-10-13 | |
| U-Boot and TF-A | Mainline U-Boot has supported evb-rk3399 since v2016.09, with an open DRAM init driver since v2017.05. Its docs list about 20 RK3399 boards, including RockPro64, ROCK Pi 4, NanoPC-T4, Khadas Edge, Puma and the Bob and Kevin Chromebooks. BL31 builds from upstream TF-A (PLAT=rk3399), so no Rockchip binaries are required. Rockchip miniloader, BL31 v1.36 and DDR blobs remain in rkbin for the vendor flow.Checked 2026-10-13 | |
| NPU toolkit | RK3399, RK3399K and RK3399-T have no NPU. For RK3399Pro: RKNN-Toolkit v1, latest release v1.7.5 (2023-08-02), deploying through airockchip/RK3399Pro_npu (last push 2023-08-03), with the NPU reached over PCIe or USB 3.0 and running its own firmware. RKNN-Toolkit2 and rknpu2 do not support RK3399Pro.Checked 2026-10-13 | |
| Video (MPP) | Rockchip MPP lists RK3399 as a supported platform and is the vendor-kernel path for decode and encode. On mainline, use V4L2 stateless decode (rkvdec, Hantro) through GStreamer or FFmpeg v4l2-request.Checked 2026-10-13 | |
| Android | FriendlyELEC publishes Android 10, 8.1 and 7.1 images and sources for its RK3399 boards.Checked 2026-10-13 | |
| Distributions | Armbian rates ROCKPro64, NanoPi R4S and ROCK Pi 4B+ as Standard support (current branch 6.18.43/44) and ROCK Pi 4B as Community (6.18.55). Upstream device trees mean Debian, Fedora and other generic arm64 distributions boot most RK3399 boards with mainline U-Boot.Checked 2026-10-13 |
RK3399 on GitHub
Repositories for this chip: vendor code, mainline work, toolkits, distributions and open hardware.
- Vendor BSPfriendlyarm/sd-fuse_rk3399FriendlyELEC SD image builder for NanoPC-T4, NanoPi M4 and NEO4; pairs with kernel-rockchip nanopi4-v4.19.y. Last commit 2026-09.
- Kernelrockchip-linux/kernelRockchip BSP kernel; RK3399 runs from release-4.4 through develop-6.12, with more than 100 device trees on develop-6.1. Last commit 2026-08.
- Kernelradxa/kernelRadxa BSP kernel; branch release-4.4-rockpi4 is the ROCK Pi 4 vendor kernel. Last commit 2026-10.
- Kernelkhadas/linuxKhadas kernel; the khadas-edge-4.4.y branch is the vendor kernel for the RK3399 Edge and Edge-V. Last commit 2026-05.
- Kerneltorvalds/linuxMainline Linux has about 65 RK3399 device trees and is the normal choice for this chip. Last commit 2026-10.
- Bootloaderrockchip-linux/u-bootRockchip U-Boot; next-dev has arch/arm/mach-rockchip/rk3399. Last commit 2026-08.
- Bootloaderrockchip-linux/rkbinDDR init, miniloader and BL31; bin/rk33 holds the rk3399 binaries, though mainline boots without them. Last commit 2026-08.
- Bootloaderu-boot/u-bootMainline U-Boot with fully open TPL DDR init for RK3399 and dozens of board configs. Last commit 2026-10.
- BootloaderTrustedFirmware-A/trusted-firmware-aRead-only mirror of TF-A; plat/rockchip/rk3399 is a mature open BL31 including the PMU M0 firmware. Last commit 2026-10.
- BootloaderTow-Boot/Tow-BootU-Boot distribution with ready builds for Pinebook Pro, RockPro64, ROCK Pi 4 and NanoPi R4S on RK3399. Last commit 2025-01.
- Bootloadercoreboot/corebootRead-only mirror of coreboot; src/soc/rockchip/rk3399 boots the Gru family Chromebooks. Last commit 2026-10.
- NPUairockchip/RK3399Pro_npuNPU driver and examples for the RK3399Pro variant only; the plain RK3399 has no NPU. Last commit 2023-08.
- Mediarockchip-linux/mppMedia Process Platform; RK3399 is listed in the README for hardware decode and encode. Last commit 2026-09.
- Mediaairockchip/librgaRGA 2D acceleration library with RK3399 in its supported chip list. Last commit 2026-06.
- Distributionarmbian/buildArmbian build framework with more than 30 RK3399 boards, mostly in the rockchip64 family on mainline kernels. Last commit 2026-10.
- DistributionMichaIng/DietPiMinimal Debian images with RK3399 builds for ROCKPro64, NanoPi M4V2, NanoPi R4S and Pinebook Pro. Last commit 2026-10.
- DistributionROCKNIX/distributionHandheld gaming distribution with an RK3399 device for the Anbernic RG552. Last commit 2026-10.
- Distributionopenwrt/openwrtOpenWrt rockchip/armv8 target builds NanoPi R4S, NanoPC-T4, ROCKPro64 and ROCK 4C Plus on RK3399. Last commit 2026-10.
- Open hardwaretalhacetinceviz/RK3399-SomBoardAltium RK3399 system on module with LPDDR4, eMMC and a DDR4 SODIMM edge, including the PCB layout. Last commit 2025-09.
- Toolsrockchip-linux/rkdeveloptoolRockchip open source USB flashing tool for maskrom and loader mode, the Linux and macOS alternative to RKDevTool. Last commit 2025-03.
RK3399 system on modules
Any of these can sit on a carrier board we design.
| Module | Vendor | Connector | RAM | Design files | Price | Buy |
|---|---|---|---|---|---|---|
| SOM-RK3399V2 | FriendlyELEC | 260-pin SO-DIMM edge (DDR4 SO-DIMM socket) | 4 GB LPDDR4, 16 to 64 GB eMMC | Module schematic PDF (1910), DXF; carrier schematic PDF for the dev kit | USD 165.00 module, USD 230.00 dev kit (FriendlyELEC store) | |
| Edge (Basic, Pro, Max) | Khadas | 314-pin gold-finger edge (MXM3) | 2 or 4 GB LPDDR4, 16 to 128 GB eMMC | Schematic and silkscreen PDF (v1.4), DXF, 3D CAD | USD 99.00 Basic (bulk, MOQ 500), USD 129.00 Pro, USD 149.00 Max (Khadas store) | |
| Core-3399-JD4 | Firefly | 260-pin SO-DIMM gold finger, 0.5 mm pitch | 2 or 4 GB LPDDR4 | Specification PDF with pinout only | USD 149.00 (Firefly store, 2 GB + 16 GB) | |
| Core-3399J | Firefly | MXM3.0 314-pin, 0.5 mm pitch | 2 or 4 GB LPDDR4 | Specification PDF only | USD 149.00 (Firefly store) | |
| PUMA SOM-RK3399-Q7 | Cherry Embedded Solutions (formerly Theobroma Systems) | Qseven | Up to 4 GB, up to 128 GB eMMC, 32 Mbit SPI NOR | Datasheet, user manual, design notes AN60303; no schematic | ||
| FET3399-C / FET3399K-C | Forlinx | 4x 80-pin board-to-board | 2 or 4 GB LPDDR3, 16 or 32 GB eMMC | Product brief only on the public page | ||
| ROM-5780 | Advantech | SMARC 2.1 | 2 GB LPDDR4, 16 GB eMMC | |||
| SOM-3399-SMARC | Geniatech | SMARC 2.1 | 2 GB LPDDR4 (4 GB option) | Specification PDF; other downloads gated | ||
| SMARC-fA3399 (legacy) | Kontron | SMARC 2.1 | Datasheet and user guide; CAD in customer portal | |||
| MINI3399 | Boardcon | 2x 100-pin plus 40-pin, 1.27 mm headers | 2 or 4 GB, 8 to 128 GB eMMC | Hardware manual Rev 2.0, connector PDF, 3D model; no schematic | ||
| CM3399 | Boardcon | 202-pin castellated, 1.0 mm pitch | 1 to 4 GB LPDDR4, 8 to 128 GB eMMC | Hardware guide, 3D model; no schematic | ||
| PICO3399 | Boardcon | MXM3.0 314-pin | 1 to 4 GB LPDDR4, 8 to 128 GB eMMC | Hardware manual, connector PDF, 3D model; no schematic | ||
| Core-3399Pro-JD4 (RK3399Pro) | Firefly | 69.6 x 85.0 mm | 3 or 6 GB, 16 or 64 GB eMMC | USD 209.00 (Firefly store, module only) |
Every public RK3399 board
| Board | Vendor | Type | RAM | Notable I/O | Design files | Price | Buy |
|---|---|---|---|---|---|---|---|
| ROCKPro64 | Pine64 | SBC, 133 x 80 mm | 2 or 4 GB LPDDR4 | Open-ended PCIe x4 slot, USB-C with DP alt mode, USB 3.0, GbE, eMMC module socket, eDP, DSI, CSI | Schematic PDF (v2.0, v2.1), board outline DXF and PDF, top silkscreen, 3D model; no layout | USD 59.99 (2 GB) or USD 79.99 (4 GB), Pine64 store, out of stock | |
| Pinebook Pro | Pine64 | Dev kit, 14 inch laptop, 1080p IPS | 4 GB LPDDR4 | USB-C with PD and DP alt mode, USB 3.0 and USB 2.0, M.2 NVMe via adapter, 64 GB eMMC, microSD | Mainboard schematic PDF (v2.1, v2.1a), daughterboard and NVMe adapter schematics, silkscreen, case drawings; no layout | USD 219.99 refurbished, Pine64 store, out of stock | |
| PinePhone Pro Explorer Edition | Pine64 | Dev kit, Phone (RK3399S) | 4 GB LPDDR4 | Mainboard schematic PDF v1.0, top and bottom placement | USD 399.00, Pine64 store, out of stock | ||
| ROCK 4A / ROCK Pi 4A | Radxa | SBC, Raspberry Pi layout | 2 or 4 GB LPDDR4 | HDMI 4K60, MIPI DSI, M.2 M-key NVMe, 2x USB 3.0, GbE, 40-pin header | Schematic PDF V1.52, component position PDF, DXF, 3D STP; no layout | ||
| ROCK 4B / ROCK Pi 4B | Radxa | SBC, Raspberry Pi layout | 1 to 4 GB LPDDR4 | HDMI 4K60, MIPI DSI, M.2 M-key NVMe, Wi-Fi 5, BT 5, GbE, PoE via HAT | Schematic PDF V1.52, component position PDF, DXF, 3D STP; no layout | ||
| ROCK 4A+ / 4B+ | Radxa | SBC, Raspberry Pi layout (RK3399 OP1) | 2 or 4 GB LPDDR4, 16 to 128 GB eMMC | HDMI 4K60, MIPI DSI, M.2 M-key NVMe, GbE, 4B+: Wi-Fi 5, BT 5 | Schematic PDF V1.6 and V1.73, component position PDF, 2D files; no layout | ||
| ROCK 4SE | Radxa | SBC, Raspberry Pi layout (RK3399-T) | 2, 4 or 8 GB LPDDR4 (Radxa page) | HDMI 2.0 4K60, MIPI DSI, M.2 M-key NVMe, Wi-Fi 5, BT 5, GbE, PoE via HAT | Schematic PDF V1.53, component position PDF, DXF V1.53; no layout | EUR 81.00 (Arduino Store) | |
| ROCK 4C+ | Radxa | SBC, Raspberry Pi layout (RK3399-T) | 4 GB LPDDR4 | Dual micro HDMI (4K + 2K), MIPI DSI and CSI, Wi-Fi 5, BT 5, GbE, PoE via HAT | Schematic PDF V1.2 and V1.411, component position PDF, 3D STEP; no layout | EUR 66.00 (Arduino Store) | |
| NanoPC-T4 | FriendlyELEC | SBC, 100 x 64 mm, 10-layer | 4 GB LPDDR3-1866 | M.2 M-key PCIe x4, HDMI 2.0a plus DP alt mode on USB-C, eDP 1.3, MIPI DSI, 2x MIPI CSI, GbE, 64 GB eMMC | Schematic PDF (1802, 1902), DXF; no layout | USD 127.00 (FriendlyELEC store) | |
| NanoPi R4S | FriendlyELEC | SBC, 66 x 66 mm, 8-layer | 1 GB DDR3 or 4 GB LPDDR4 (store offers 4 GB) | 2x GbE (native plus PCIe NIC), 2x USB 3.0, Fan header, USB-C power | Schematic PDF (1 GB and 4 GB, 2008), DXF; no layout | USD 75.00 (FriendlyELEC store, 4 GB) | |
| NanoPi R4SE | FriendlyELEC | SBC, 66 x 66 mm, 8-layer | 4 GB LPDDR4, 32 GB eMMC | 2x GbE (native plus PCIe), 2x USB 3.0, microSD, USB-C 5 V | Schematic PDF (2205), DXF; no layout | ||
| NanoPi M4V2 | FriendlyELEC | SBC, 85 x 56 mm, 8-layer | 4 GB LPDDR4 | 4x USB 3.0, PCIe x2 on 24-pin header, 2x2 Wi-Fi 5, BT 4.1, GbE, 40-pin header | Schematic PDF (1908), DXF; no layout | USD 80.00 (FriendlyELEC store, temporarily stopped) | |
| NanoPi M4B | FriendlyELEC | SBC, 85 x 56 mm, 8-layer | 2 GB DDR3 | PCIe x2 on 24-pin header, Wi-Fi 5, BT 5.0, USB 3.0, GbE | Schematic PDF (1909), DXF; no layout | USD 62.00 (FriendlyELEC store, out of stock) | |
| NanoPi M4 (discontinued) | FriendlyELEC | SBC, 85 x 56 mm, 8-layer | 2 or 4 GB | 4x USB 3.0, PCIe x2 on 24-pin header, MIPI CSI, GbE | Schematic PDF (2 GB and 4 GB, 1807), DXF | ||
| NanoPi NEO4 (discontinued) | FriendlyELEC | SBC, 60 x 45 mm, 8-layer | 1 GB DDR3-1866 | GbE, USB 3.0 plus USB-C OTG, HDMI 2.0a, MIPI CSI, PCIe x2 on header | Schematic PDF (1808, 2008), DXF | ||
| Captain | Khadas | Carrier | Schematic and silkscreen PDF (v1.2), DXF, 3D CAD, PCB file (.brd in a .7z) | ||||
| Edge-V | Khadas | SBC, Khadas VIM form factor | 2 or 4 GB LPDDR4X | M.2 PCIe x4, GbE with WOL, Dual MIPI CSI, USB-C PD | Schematic and silkscreen PDF (v1.3), DXF, 3D CAD | USD 219.00 (Khadas store, out of stock) | |
| ROC-RK3399-PC Pro | Firefly | SBC, 120 x 72 x 11.2 mm | 2 or 4 GB LPDDR4 | HDMI 2.0, Type-C DP 1.2, M.2 2242 NVMe, Wi-Fi 5, BT 5, GbE | Specification PDF, 3D model | USD 169.00 (Firefly store, 2 GB + 32 GB) | |
| AIO-3399J | Firefly | SBC, 182.79 x 107.06 mm industrial board | 2 or 4 GB LPDDR4 | HDMI 2.0 out, optional HDMI in, Dual LVDS, eDP, M.2 PCIe, mini-PCIe 4G, RS232, RS485 | 3D model | USD 239.00 (Firefly store) | |
| AIO-3399C(AI) | Firefly | SBC, 126 x 91.3 mm | 2 or 4 GB LPDDR4 | HDMI 2.0, eDP, dual LVDS, PoE+ (802.3at), RS232, RS485, mini-PCIe 4G | Specification PDF, 3D model | USD 189.00 (Firefly store) | |
| Renegade Elite (ROC-RK3399-PC) | Libre Computer | SBC, 120 x 72 x 14 mm | 4 GB LPDDR4 | 2x USB 3.0 Type-C with DP, HDMI 2.0, GbE, optional PoE, M.2 PCIe x4 via mezzanine | USD 155 (Libre Computer) | ||
| Orange Pi 4 LTS | Orange Pi | SBC, 56 x 91 mm | 3 or 4 GB LPDDR4 | HDMI 2.0, USB 3.0 Type-C, mini-PCIe, GbE | Schematic and mechanical downloads (vendor support page) | ||
| Orange Pi 4 | Orange Pi | SBC | 4 GB LPDDR4 | HDMI 2.0, DP 1.2 via Type-C, 2x USB 3.0, GbE, 24-pin PCIe connector | Schematic downloads (vendor support page) | ||
| Orange Pi 800 | Orange Pi | Dev kit, Keyboard PC | 4 GB LPDDR4, 64 or 128 GB eMMC | HDMI 2.0 4K60, VGA, 2x USB 3.0, GbE, 26-pin header | Schematic downloads (vendor support page) | ||
| Orange Pi RK3399 (EOL) | Orange Pi | SBC, 99 x 129 mm | 2 or 4 GB DDR3 | GbE, HDMI, mini-PCIe, USB 3.0, Type-C | |||
| HAIKOU CB-MINI-ITX | Cherry Embedded Solutions | Carrier, Mini-ITX | |||||
| OK3399-C | Forlinx | Dev kit, 130 x 155 mm or 130 x 140 mm | 40-pin Raspberry Pi compatible header, HDMI 2.0, MIPI DSI, MIPI CSI | ||||
| EM3399 | Boardcon | Dev kit, 145 x 100 mm | 1 to 4 GB | HDMI in (TC358749XBG), PCIe x4, eDP, MIPI DSI, GbE, mini-PCIe 4G | Hardware manual only | ||
| Idea3399 | Boardcon | SBC, 135 x 90 mm | 1 to 4 GB LPDDR4 | M.2 NVMe, mini DP plus HDMI 2.0, mini-PCIe with SIM, 2x MIPI camera | |||
| Helios64 (EOL) | Kobol | SBC, NAS board | 4 GB LPDDR4 | 5x SATA 3.0, 2.5 GbE plus GbE, USB-C with DP | Schematic PDF Rev 1.2, mounting drawings; no layout | ||
| Rock960 (discontinued) | Vamrs / 96Boards | SBC, 96Boards CE | 2 or 4 GB LPDDR3-1866 | ||||
| ROCK Pi N10 (RK3399Pro) | Radxa | SBC, 100 x 100 mm | 4 GB CPU plus 1 to 4 GB NPU LPDDR3 | HDMI 2.0, eDP 1.3, M.2 PCIe x4, USB 3.0, GbE | Wiki lists module and carrier schematics, but the files are no longer available | ||
| AIO-3399ProC (RK3399Pro) | Firefly | SBC, 138 x 91.3 mm | 3 or 6 GB, 16 GB eMMC | USD 249.00 (Firefly store) | |||
| TB-RK3399ProD (RK3399Pro) | Toybrick (Rockchip) | Dev kit | Schematic PDF hosted by distributor Seeed | ||||
| Tinker Edge R (RK3399Pro) | ASUS | SBC | 4 GB LPDDR4 plus 2 GB NPU memory, 16 GB eMMC |
Prices and links as checked on the dates in our data; the latest check on this page was 2026-10-13. Amazon links marked * are affiliate links; see our disclosure.
Boards with published design files
| Project | Author | Files | Tool | License |
|---|---|---|---|---|
| Khadas Captain carrier for Edge | Khadas | Schematic PDF v1.2, Silkscreen PDF, PCB file Captain_V12_MXM3.brd (in .7z; tool not confirmed), DXF, 3D CAD | Not stated | |
| RK3399 SoM board (hobby project) | talhacetinceviz (GitHub) | Altium schematic sheets (.SchDoc): CPU, 2x LPDDR4, PMIC, CPU/GPU bucks, eMMC, RGMII PHY, Type-C, Altium PCB (.PcbDoc), Altium project (.PrjPcb) | Altium | None stated |
Buying the chip
RK3399 is stocked in single units at LCSC; RK3399K is listed but out of stock, and RK3399-T and RK3399Pro are not listed. Volume pricing and long-term supply go through Rockchip agents; Rockchip does not publish a distributor list we could confirm.
- LCSC: RK3399 (C22364186)
- FCBGA-828 21x21. USD 22.47 at qty 1, USD 21.29 at qty 30; 54 in stock on 2026-10-13.
- LCSC: RK3399K (C22364190)
- FCBGA-828 21x21. USD 32.32 at qty 1, USD 31.53 at qty 10; 0 in stock on 2026-10-13.
Datasheet, TRM and design documents
Linked where they are publicly hosted; we do not rehost Rockchip documents. These are third-party documents: we are not responsible for their accuracy, availability or confidentiality status. Disclosure.
- DatasheetRockchip RK3399 DatasheetRev 2.1 · 2020-03 · hosted by LCSC · checked 2026-10-13
- DatasheetRockchip RK3399 Datasheet (older revision)Rev 1.7 · 2017-06 · hosted by Khadas · checked 2026-10-13
- DatasheetRockchip RK3399-T DatasheetRev 1.0 · 2021-08 · hosted by Radxa · checked 2026-10-13
- TRMRockchip RK3399 TRM Part 1Rev 1.4 · 2017-04 · hosted by Khadas · checked 2026-10-13
- PMICRockchip RK808 Power Management System Technical Specifications (preliminary)V0.8 · 2014-09-13 · hosted by Pine64 · checked 2026-10-13
- TRMRockchip RK3399 TRM Part 2Rev 1.3 · 2016-12 · community mirror (rockchip.fr (community mirror)), not hosted by Rockchip · checked 2026-10-13
- DatasheetRockchip RK3399Pro DatasheetRev 1.0 · 2018-11 · hosted by Seeed (Toybrick distributor) on GitHub · checked 2026-10-13
- DatasheetRockchip RK3399Pro Datasheet (package quantity update only)Rev 1.1 · 2019-10 · community mirror (rockchip.fr (community mirror)), not hosted by Rockchip · checked 2026-10-13
- PMICRockchip RK808 DatasheetRev 1.6 · 2019-08 · community mirror (rockchip.fr (community mirror)), not hosted by Rockchip · checked 2026-10-13
- Product briefRockchip RK3399 product pagehosted by Rockchip · checked 2026-10-13
Questions about the RK3399
Not the RK3399 itself. We have designed and brought up boards on the Rockchip RV1106, RV1126, RV1126B, RK3566, RK3568, RK3576 and RK3588, and on the Allwinner T507 and A527/T527. The work carries over: power tree, DDR and high-speed layout, bring-up and the BSP, read against this chip's own datasheet.
LCSC hosts the newest revision we found, Rev 2.1 (March 2020), on part C22364186. Khadas hosts Rev 1.7 (June 2017) and TRM Part 1 Rev 1.4 (April 2017). Radxa hosts the RK3399-T datasheet Rev 1.0 (August 2021). TRM Part 2 (Rev 1.3, December 2016) is only on the rockchip.fr community mirror, linked here and labeled as a mirror.
No. The RK3399, RK3399K and RK3399-T have no neural accelerator. The RK3399Pro is a different package (FCBGA1372, 27 x 27 mm) that adds an NPU of 1920 INT8 MACs per cycle at up to 800 MHz with its own DRAM interface; Rockchip markets it as up to 3.0 TOPS. It is programmed with the original RKNN-Toolkit (last release 1.7.5, 2023) and the RK3399Pro_npu runtime, not RKNN-Toolkit2.
Among the most complete of any Rockchip SoC. CPU, PCIe, USB 3.0 and Type-C, HDMI, eDP, DSI and DP, Panfrost GPU, the rkisp1 camera ISP, and H.264, H.265 and VP9 hardware decode are all upstream. 42 RK3399-family board device trees ship in Linux 7.2. The boot chain is fully open: mainline U-Boot does DRAM init and upstream TF-A provides BL31.
Same FCBGA828 package. RK3399K runs the A72 cores at 2.0 GHz and the A53 cores at 1.6 GHz and is rated -20 to 85 C. RK3399-T is cut down to 1.5 GHz and 1.0 GHz with a 600 MHz GPU, and its datasheet drops PCIe. The base RK3399 runs at 1.8 GHz and 1.4 GHz, 0 to 80 C.
Treat it as Gen1 x4 (2.5 GT/s per lane, about 1 GB/s each way). That is what the datasheet specifies and what mainline enforces. Rockchip has asked upstream not to run 5 GT/s.
For the same price class with better I/O, RK3566 or RK3568. For more CPU, an NPU and more than 4 GB of DRAM, RK3576 or RK3588. Stay on RK3399 when the open boot chain and mature mainline support matter more than performance.
Related chips and reading
- RK3568Routers, NAS, gateways, NVR, industrial HMI
- RK3566HMI, e-ink readers, handhelds, CM4-class SoMs, small routers
- RK3576Edge AI boxes, HMI, NVR, Arm PC, tablets
- RK3588 / RK3588SEdge AI boxes, NVR, 8K signage, Arm desktops and servers
- RK3328Routers, TV boxes, Klipper hosts
- RK3288Signage, HMI panels, kiosks, legacy 32-bit products
We'll design your RK3399 board.
Tell us the interfaces, power budget and volume. An engineer replies with questions or a proposal.
Links and facts on this page checked 2026-10-13. Spotted something out of date? Tell us through the contact form.
Compiled from publicly available sources: datasheets, technical reference manuals, vendor product pages, schematics and source code published by their owners and third parties. We link to documents where others host them and do not host, endorse or vouch for them. Everything on these pages, including our own specs, summaries, block diagrams, comparisons, calculators and design notes, is for reference only and may contain errors or be out of date. It is provided as is, and Groundplane is not responsible for errors in it, for third-party documents, or for any design, board or decision based on it. Always check the manufacturer's current datasheet, reference manual and design guidance before you design a board. Rockchip, Allwinner, Raspberry Pi and other product names are trademarks of their owners; we are not affiliated with any of them. See our disclosure.