MIPI CSI-2 bandwidth calculator
The bit rate a camera stream needs over MIPI CSI-2, and how many D-PHY data lanes carry it at the per-lane rate you choose.
- Required link rate, with blanking
- 2.986 Gbit/s
- Active pixel payload
- 2.488 Gbit/s
- Pixel rate, with blanking
- 298.6 Mpixel/s
- Bits per pixel, RAW10
- 10
| Data lanes | Rate per lane | Share of 1.5 Gbit/s | Result |
|---|---|---|---|
| 1 | 2.986 Gbit/s | 199% | Too fast |
| 2 | 1.493 Gbit/s | 100% | Fits |
| 3 | 0.995 Gbit/s | 66% | Fits |
| 4 | 0.746 Gbit/s | 50% | Fits |
How this is calculated
bit rate = H · V · fps · bits per pixel · ( 1 + overhead ) lanes = ceil( bit rate / lane rate )
- Bits per pixel
- RAW8, RAW10, RAW12 and RAW14 carry 8, 10, 12 and 14 bits. YUV422 8-bit carries 16 (8 bits of luma per pixel plus chroma shared by each pair). RGB888 carries 24.
- Overhead default
- 20%. CTA-861 1080p60 runs 3.56 Gbit/s against 2.99 Gbit/s of active pixels at 24 bit, 19% overhead; reduced blanking (CVT-RB) is about 11.5%. A camera sensor sets its own: (line length × frame length) / (H × V) − 1 from its timing registers, plus CSI-2 packet headers and low-power transitions.
- Lane rate
- The 1.5 and 2.5 Gbit/s presets are rates to try, not claims about any SoC. Use the lower of the sensor and receiver maxima from their datasheets.
- Not covered
- C-PHY and A-PHY links, and virtual channel interleaving of several streams on one link; add those bit rates together.
- MIPI Alliance, Camera Serial Interface 2 (MIPI CSI-2) specification overviewv4.2, December 2025
- MIPI Alliance, MIPI D-PHY specification overviewv3.6, September 2025
- Synopsys press release: DesignWare MIPI D-PHY compliant to D-PHY v1.2, up to 2.5 Gbps per lane17 September 2014
- Wikipedia, Coordinated Video Timings: data rate table, CTA-861 and CVT-RB at 1920 × 1080, 60 Hz
Questions
3840 × 2160 at 30 fps in RAW10 is 2.49 Gbit/s of pixels, about 2.99 Gbit/s with 20% overhead. That needs 2 lanes at 1.5 Gbit/s per lane (1.49 Gbit/s each, nearly full) or 2 lanes at 2.5 Gbit/s with headroom. In YUV422 it is 4.78 Gbit/s and needs 4 lanes at 1.5 Gbit/s.
Video formats spend time outside the active picture. CTA-861 1080p60 carries 3.56 Gbit/s at 24 bit for 2.99 Gbit/s of active pixels, 19% more; reduced blanking timings cut that to about 11.5%. Camera sensors set their own blanking through line length and frame length registers, so use the figure from your sensor mode when you have it.
The lower of the sensor maximum and the SoC receiver maximum, both from datasheets. D-PHY v1.2 raised the per-lane ceiling to 2.5 Gbit/s, and D-PHY v3.0 runs 9 Gbit/s on a standard channel, but the PHY version only sets a ceiling: the rate a given sensor or receiver supports is in its own datasheet.
RAW, when the SoC has an ISP to process it. RAW10 needs 10 bits per pixel against 16 for YUV422, so the same link carries 1.6 times the pixel rate. YUV makes sense when the sensor does its own image processing or the receiver has no ISP.