T113
Dual Cortex-A7 display and control SoC with 128 MB DDR3 inside an eLQFP128 (T113-S3; 256 MB on T113-S4): no external DRAM routing, 2-layer-friendly HMI boards with RGB, dual LVDS or 4-lane DSI, GbE MAC and two CAN controllers. T113-I moves to BGA with external DDR3 and 4K30 decode.
- CPU
- 2x A7 + HiFi4 DSP
- GPU
- None (2D G2D only)
- NPU
- None
- Video
- 1080p60 H.265/H.264 dec, 1080p60 JPEG/MJPEG enc
- PCIe
- None
What the T113 is for
Right for
- Linux HMI panels up to 1920 x 1200: RGB, dual-link LVDS or 4-lane MIPI DSI from a QFP part with DRAM already inside, so the board needs no DDR routing
- CAN and RS485 gateways and controllers: two CAN 2.0B controllers, a GbE MAC (RGMII or RMII), six UARTs and a 1080p display on one chip; mainline sun4i_can supports it since Linux 6.6
- Low-layer-count or hand-assembled boards: eLQFP128 at 14 x 14 mm with internal DRAM; public designs such as TinyEmbedded-Dual and Trellis Core are complete KiCad or Altium boards around it
- Car and kiosk displays with analog video: two CVBS inputs with a decoder, CVBS output, an 8-bit parallel camera port and an on-chip audio codec
- Wide-temperature industrial modules on T113-I: rated -40 to 85 C ambient, external DDR2/DDR3 up to 2 GB, sold as stamp-hole SoMs by Forlinx, MYIR, Tronlong and Ebyte
Wrong for
- Anything needing a 3D GPU, an NPU, PCIe, SATA or USB 3: the T113 has only a 2D G2D engine and two USB 2.0 ports
- Video encode beyond JPEG/MJPEG: there is no H.264 or H.265 encoder on any T113 part
- Memory-hungry userlands on T113-S3/S4: 128 or 256 MB is fixed in the package; Qt, Python or Chromium-class stacks need T113-I with external DDR3
- Products that need hardware video decode, the audio codec or CVBS on mainline Linux today: none of those blocks has a mainline device tree node as of 7.3-rc7
- HDMI output: no T113 part has an HDMI transmitter (vendor boards with HDMI add a MIPI or RGB bridge)
Cost and constraints
- BOM is the SoC (T113-S3 USD 18.42 at 90 pieces on LCSC; T113-I listed at USD 4.32 at 119), a 24 MHz crystal, a 0.9 to 0.95 V core buck, 3.3 V, and SPI NAND, eMMC or SD; MangoPi MQ-R does it with two SY8008 bucks and one LDO
- In-package DRAM sets the memory ceiling: 128 MB DDR3 (T113-S3), 256 MB (T113-S4), 64 MB DDR2 (T113-S2 and R528-S2); only T113-I takes external memory
- Ambient rating on T113-S3 is -25 to 75 C, or -25 to 85 C only with a heatsink; industrial range needs T113-I
- The HiFi4 DSP (and the C906 RISC-V core on T113-I and, per linux-sunxi, T113-S4) only run under the Allwinner Tina BSP; mainline Linux has no remoteproc driver for them
- Boot is BROM to SPI NOR, SPI NAND, SD or eMMC with two strap pins; mainline U-Boot covers only the MangoPi MQ-R defconfig, so other DRAM and board setups start from the vendor boot0
Inside the T113
Drawn by Groundplane from the datasheet v2.0. Not Allwinner artwork.
- SD 3.0
- SDIO 3.0
- eMMC 5.0
- SPI NOR or SPI NAND
- 2x Cortex-A7
- 32 KB L1 I/D per core
- 256 KB shared L2
- NEON SIMD, FPU
- HiFi4 DSP
- 64 KB I-RAM, 64 KB D-RAM
- Message box to the A7 cluster
- 1080p60 H.265/H.264 decoder
- JPEG/MJPEG encoder 1080p60
- G2D 2D engine, de-interlacer
- 128 MB DDR3 in package (S3)
- BROM: SD, eMMC, SPI NOR/NAND
- Display engine, main and aux
- SmartColor 2.0 post-processing
- TCON LCD and TCON TV
- 8-bit parallel CSI
- CVBS decoder, 2 inputs
- Crypto engine, TRNG
- 2 Kbit eFuse, secure boot
- TrustZone
- CCU, 8 PLLs, 24 MHz DCXO
- Internal LDOA and LDOB
- Thermal sensor, RTC
- 16-ch DMA, timers, IOMMU
- GbE MAC (RGMII or RMII)
- USB 2.0 DRD
- USB 2.0 host
- 2x CAN 2.0B
- RGB, dual LVDS, 4-lane DSI
- CVBS out, 2x CVBS in
- 8-bit parallel camera
- Audio codec, 2x I2S, DMIC
- UART x6, I2C x4, SPI x2, PWM x8
Read from the documents
Each value names the document it was read from.
| CPU | 2x Cortex-A7, 32 KB L1 I/D per core, 256 KB shared L2, NEON, FPU; plus a HiFi4 DSP (32 KB L1 I/D, 64 KB I-RAM, 64 KB D-RAM). No maximum CPU clock is stated in the datasheet | Datasheet V2.0, 2.1, 2.2 |
|---|---|---|
| GPU | None. 2D G2D accelerator (layers to 2048 x 2048, rotate, scale 1/16x to 32x, LBC decompression) and a de-interlacer to 1080p60 | Datasheet V2.0, 2.5.2, 2.5.3 |
| NPU | None | Datasheet V2.0, Features |
| Video decode | H.265 MP@L4.1, H.264 HP@L4.2, H.263, MPEG-1/2/4, JPEG, Xvid, Sorenson Spark up to 1080p60; MJPEG 1080p30 (T113-I: H.265 4K30, H.264 4K24) | Datasheet V2.0, 2.4 |
| Video encode | JPEG/MJPEG up to 1080p60 with input scaler; no H.264 or H.265 encoder | Datasheet V2.0, 2.4 |
| Memory | 128 MB DDR3 in package (system in package), clock up to 800 MHz; VCC-DRAM 1.5 V. No external DRAM bus on T113-S3 | Datasheet V2.0, 2.3.2, Table 5-2 |
| Storage | Three SD/MMC hosts: SD 3.0 (SMHC0), SDIO 3.0 (SMHC1), eMMC 5.0 (SMHC2), 1 or 4 bit; boot from SD, eMMC, SPI NOR or SPI NAND | Datasheet V2.0, 2.3.1, 2.3.3 |
| Display | Display engine to 2048 x 2048 with main and aux channels; RGB to 1920 x 1080 at 60; LVDS dual link to 1920 x 1080 at 60 (single link 1366 x 768); 4-lane MIPI DSI v1.01 to 1920 x 1200 at 60; i8080 and serial RGB to 800 x 480; BT.656; 1-ch CVBS out; SPI DBI | Datasheet V2.0, 2.5.1, 2.6, 2.11.5 |
| Camera | 8-bit parallel CSI (RAW8, YUV422/420, BT.656/601, 148.5 MHz pixel clock); 2-ch CVBS in with one decoder and 3D comb filter; no MIPI CSI and no ISP | Datasheet V2.0, 2.7 |
| PCIe | None | Datasheet V2.0, Features |
| SATA | None | Datasheet V2.0, Features |
| USB | 1x USB 2.0 DRD (USB0, host or device, used for FEL download) and 1x USB 2.0 host (USB1), both with integrated PHYs | Datasheet V2.0, 2.11.1, 2.11.2 |
| Ethernet | 1x EMAC, 10/100/1000 with RGMII or RMII to an external PHY | Datasheet V2.0, 2.11.3 |
| Audio | On-chip codec: 2 DACs (to 192 kHz, stereo headphone out), 3 ADCs (mic, line in, FM in); 2x I2S/PCM with TDM to 16 channels; DMIC up to 8 mics; S/PDIF (OWA) TX | Datasheet V2.0, 2.9 |
| Security | Crypto engine (AES, DES, 3DES, RSA to 2048, MD5, SHA-1 to SHA-512, HMAC, TRNG), 2 Kbit eFuse, secure boot with SHA-256 and RSA-2048, TrustZone (SMC, SPC) | Datasheet V2.0, 2.10 |
| Other I/O | 2x CAN 2.0A/B, 6x UART (UART1 to 3 with flow control), 2x SPI (SPI1 also DBI), 4x I2C (TWI), 8x PWM with capture, CIR RX and TX, 1-ch GPADC, 4-wire TPADC, LEDC for up to 1024 serial LEDs | Datasheet V2.0, 2.11 |
| Package | eLQFP128, 14 x 14 x 1.4 mm, exposed pad (footprint must use the 5.72 mm pad set); 102 I/O pins; MSL3 | Datasheet V2.0, 2.12, 4.1, 7.2, 8 |
| Temperature | Ambient -25 to 85 C with external VCC-DRAM and a heatsink, -25 to 75 C with external VCC-DRAM only; Tj -25 to 110 C (T113-I: ambient -40 to 85 C, Tj -40 to 115 C) | Datasheet V2.0, Table 5-2 |
| Thermal | theta-JA 20.36, theta-JB 7.43, theta-JC 5.52 C/W (JESD51); one sensor in the CPU, +/-3 C from 0 to 100 C | Datasheet V2.0, 2.8.6, Table 6-1 |
Variants
| T113-S3 | Base part covered by the datasheet: 2x Cortex-A7, HiFi4 DSP, 128 MB DDR3 in package, eLQFP128 14 x 14 mm, 1080p60 decode. No RISC-V core is mentioned in any T113-S3 datasheet or user manual revision opened. | Datasheet V2.0 |
|---|---|---|
| T113-S4 | Same eLQFP128 package with 256 MB DDR3 in package. Allwinner's T113 page lists 64, 128 and 256 MB SiP options; the linux-sunxi family table maps the S4 marking M4020DC0 to BSP name t113_s4 and adds a XuanTie C906 RISC-V core and a 1.0 GHz CPU clock. No Allwinner T113-S4 datasheet was found on any host, so the C906 and clock are not confirmed by a primary document. Trellis Core describes it as pin compatible with the S3. | Other |
| T113-I | Different die package: LFBGA337, 13 x 13 mm. External DDR2 (to 533 MHz) or DDR3 (to 800 MHz), up to 2 GB. Adds a RISC-V CPU (named XuanTie C906 in the T113-i brief and vendor SoM docs), H.265 decode to 4K30 and H.264 to 4K24, three I2S ports, line out, 2-ch GPADC and an LRADC. Ambient -40 to 85 C, Tj -40 to 115 C. | Datasheet V1.4 |
| T113-S2 | 64 MB DDR2 in package and MIPI DSI limited to 1280 x 720 at 60 according to the linux-sunxi family table; no Allwinner document for it was found. The Tina5 SDK has a t113s2 board with an AXP313A (axp1530) PMIC variant. | Other |
| R528-S3 / R528-S2 | Same CPU, DSP and video engine as T113 (1080p60 decode, JPEG/MJPEG encode) but a different package: LFBGA226, 12 x 12 mm, 0.65 mm pitch, so not footprint compatible with T113-S3. R528-S3 has 128 MB DDR3 and R528-S2 64 MB DDR2 in package, pin to pin with each other. The user manual feature list has no CAN and no CVBS in or out; its message box section lists a RISC-V CPU as a third processor. Mainline U-Boot builds T113 under MACH_SUN8I_R528. | TRM Rev 1.3 |
What to watch when you design with it
Power and PMIC
No PMIC is needed. Rails are VDD-CORE/VDD-SYS (0.95 V typical, 0.85 to 0.99 V in Datasheet V2.0; V1.6 listed 0.9 V), VCC-IO 3.3 V, 1.8 V analog and PLL, and VCC-DRAM 1.5 V for the in-package DDR3. Two internal LDOs run from a 2.4 to 3.6 V LDO-IN: LDOA gives 1.8 V for analog and I/O, LDOB gives 1.35, 1.5 or 1.8 V (1.35 V default). V2.0 rates VDD-CORE at 800 mA worst case and VCC-DRAM at 400 mA. Power-on rules: VCC-RTC first, VCC-IO at least 2 ms before VDD-SYS and VDD-CORE, VCC-DRAM stable before DRAM init, and reset held low for 64 ms after all rails are stable. The MangoPi MQ-R uses two SY8008 bucks (3.3 V, and 0.88 V shared by core and system) and an XC6206 2.8 V LDO for the PE bank; the Tina5 SDK's only PMIC-based T113 board is a T113-S2 variant with an AXP313A.
Sources: Datasheet V2.0, Datasheet V1.6, Board schematic V1.0, Other, github.com
DDR
On T113-S3, T113-S4, T113-S2 and R528 the DRAM is in the package, so there is no DDR layout: the board only supplies VCC-DRAM (1.5 V) and VDD18-DRAM (1.8 V), decoupled at the pins. The DRAM still has to be trained by the boot code: mainline U-Boot gained the R528/T113-s3/D1(s) DRAM driver in v2024.01 and the MangoPi MQ-R defconfig runs it at 792 MHz with board-specific TPR and ZQ values; vendor boot0 (Tina) is the alternative. T113-I has an external DDR2/DDR3 interface up to 2 GB at up to 800 MHz (DDR3), which brings back a BGA fanout and DRAM routing; MYIR MYC-YT113i and Tronlong SOM-TLT113 are 8-layer modules, against 6 layers for the MYIR T113-S3 module.
Sources: Datasheet V2.0, Datasheet V1.4, github.com, github.com
High-speed interfaces
The fastest signals are RGMII, dual LVDS, 4-lane MIPI DSI and the two USB 2.0 pairs; there is no PCIe, SATA or USB 3. LVDS power is 1.8 V and the datasheet rates it at 50 mA for 700 MHz dual link (V1.6). On mainline, routing DSI or LVDS through TCON TOP needed a fix ("drm/sun4i: tcon: Set output mux for DSI and LVDS") that lands in 7.3. The Datasheet V1.6 SD/eMMC limits are SDR 150 MHz at 1.8 V I/O and DDR 50 MHz.
Sources: Datasheet V1.6, Datasheet V2.0, git.kernel.org
Boot and FEL
Two strap pins, BOOT-SEL[1:0] on PC4 and PC5 (shared with SPI0 and SDC2), pick the boot order when the BOOT_MODE eFuse bit is 0: 00 SPI NOR then SPI NAND; 01 SD then SPI NOR; 10 SD then SPI NAND; 11 SD then eMMC. With the eFuse bit set, eFuse fields choose instead. The BROM flow in the user manual checks a FEL select before media boot and falls through to the mandatory upgrade (FEL, USB download) process when media boot fails; the datasheet pin list has no dedicated FEL pin. FEL runs on the USB0 DRD port; tools are sunxi-fel (linux-sunxi) or Allwinner PhoenixSuit. Boards such as LCPI-PC-T113 add BOOT and FEL buttons. Secure boot (X.509, SHA-256, RSA-2048) is enabled by an eFuse and is irreversible.
Sources: TRM V1.1, Datasheet V2.0, linux-sunxi.org
Thermal
T113-S3 theta-JA is 20.36 C/W in still air with Tj max 110 C. The ambient ratings depend on how VCC-DRAM is supplied and whether a heatsink is fitted: -25 to 85 C with external VCC-DRAM and a heatsink, -25 to 75 C without the heatsink (V1.6 printed the lower limit as 25 C; V2.0 corrects it to -25 C). Datasheet V1.6 listed LDOB as the SDRAM supply; V2.0 drops that wording. Mainline gained the D1/T113 THS driver support in 6.8, but the sensor node and the 85 C passive trip in the T113 dtsi only landed in 7.0.
Sources: Datasheet V2.0, Datasheet V1.6, git.kernel.org
Gotchas
The footprint must use the second exposed-pad size (D3/E3 5.72 mm REF); the datasheet carries a caution that the package is built to it. R528 is LFBGA226, not a relabeled T113-S3, so R528 boards are not a T113 layout reference. T113-S3 and D1s share the eLQFP128 and, per linux-sunxi, are pin compatible except for CAN; boards such as MangoPi MQ-R and LCPI-PC-T113 ship in both versions. Datasheet revisions keep changing Table 5-2 (operating conditions) and the S/PDIF block (RX removed in V2.0), so design to V2.0.
Sources: Datasheet V2.0, Datasheet V1.6, TRM Rev 1.3, Other
Layout guides for the T113's interfaces
Public layout guidance for each interface this chip has, from vendors who publish it, plus our calculators.
DDR3 / DDR3L
Fly-by command/address with termination at the end of the chain, point-to-point data lanes matched to their strobe, and a clean VREF. ST recommends 55 ohm single-ended and 100 ohm differential for DDR3 and DDR3L on STM32MP1 boards, and shows that a 4-layer board is possible with strict layer allocation.
- STM32MP1 Series DDR memory routing guidelinesSTMicroelectronics, AN5122, 3, 2019
- DDR3 Design Requirements for KeyStone DevicesTexas Instruments, SPRABI1, D, 2022
- SL2610 General PCB Design and DDR3L/DDR4 & LPDDR4(x) Interface Layout GuidelinesSynaptics, PN 506-001629-01, A, 2025
- DDR length matching calculatorGroundplane calculator
eMMC
A single-ended bus: CLK, CMD, DAT0 to DAT7 and, for HS400, the data strobe. TI and Synaptics both route it at 50 ohm single-ended, match the group, and keep stubs short; Synaptics places a 22 or 33 ohm series resistor on CLK and STRB. At HS400 TI also checks the eMMC I/O supply impedance, not just the traces.
- AM62Px eMMC HS400 Board Design and Simulation GuidelinesTexas Instruments, SPRADP5, A, 2026
- Astra Machina Foundation Series eMMC ConfigurationSynaptics, PN 506-001594-01, D
- i.MX28 Layout and Design GuidelinesNXP (Freescale), AN4215, 0, 2010
SD card / SDIO
Single-ended CLK, CMD and four data lines over a solid ground plane, at constant trace width and matched length. NXP asks for clock-to-neighbor spacing greater than twice the trace height above the plane and 1.5 times for data and CMD, with 45 degree bends. UHS modes switch the I/O to 1.8 V, so a level translator often sits next to the socket.
- NVT4557/NVT4558/NVT4858 voltage-level translator layout guidelineNXP, AN13158, 1.1, 2022
- i.MX28 Layout and Design GuidelinesNXP (Freescale), AN4215, 0, 2010
- SD Physical Layer Simplified SpecificationSD Association, 9.10, 2023
PCIe
AC-coupled differential lanes routed with no stubs, minimal vias and back-drilled or blind vias where speed demands, with lane-to-lane skew handled by the receiver. Targets differ by guide: TI Jacinto 7 uses 85 ohm differential for lanes and 100 ohm for the reference clock, while TI's earlier SoC guide tabulates 100 ohm and, for some devices, 95 ohm. Match the target to your connector and stackup.
- Jacinto7 AM6x, TDA4x, and DRA8x High-Speed Interface Design GuidelinesTexas Instruments, SPRACP4, A, 2024
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
USB 2.0
One D+/D- pair at 90 ohm differential, routed in parallel for its whole length with minimal deviations at the connector and package. NXP keeps clocks and periodic signals at least 50 mils away and other signals at least 20 mils away from the pair.
- High-Speed Layout Guidelines for Signal Conditioners and USB HubsTexas Instruments, SLLA414, A, 2026
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
- i.MX28 Layout and Design GuidelinesNXP (Freescale), AN4215, 0, 2010
MIPI DSI
MIPI D-PHY clock and data lanes are routed as 100 ohm differential pairs over a solid reference; TI Jacinto 7 allows no stubs, 2 vias per trace and 40 ps lane-to-lane skew. Connectors and flex cables to the panel are usually the largest discontinuity, so keep the board segment short and clean.
- Jacinto7 AM6x, TDA4x, and DRA8x High-Speed Interface Design GuidelinesTexas Instruments, SPRACP4, A, 2024
- PCB Design Guidelines (HSSI, EMIF, MIPI, True Differential, PDN) User Guide: Agilex 5 FPGAs and SoCsAltera, 821801, 2026
MIPI CSI-2
Same D-PHY rules as DSI: 100 ohm differential lanes in both TI guides, with lane-to-lane skew bounded (40 ps in TI Jacinto 7). Size the lane count and lane rate from the sensor's output format before routing.
- Jacinto7 AM6x, TDA4x, and DRA8x High-Speed Interface Design GuidelinesTexas Instruments, SPRACP4, A, 2024
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
- PCB Design Guidelines (HSSI, EMIF, MIPI, True Differential, PDN) User Guide: Agilex 5 FPGAs and SoCsAltera, 821801, 2026
- MIPI CSI-2 bandwidth calculatorGroundplane calculator
LVDS
Tightly coupled differential pairs terminated at the receiver in 100 ohm, with TI's EMI guide asking for 100 ohm differential traces within 5 percent. Keep pairs matched and away from other aggressors, and avoid stubs and reference plane gaps along the route to the panel connector.
- LVDS Owner's Manual: Including High-Speed CML and Signal ConditioningTexas Instruments, SNLA187, 4th edition, 2008
- High-Speed Layout Guidelines for Reducing EMI for LVDS SerDes DesignsTexas Instruments, SNLA302, 2018
- LVDS SerDes Gen I PCB and Interconnect Design-In GuidelinesTexas Instruments, SNLA008, A, 2018
Ethernet (RGMII / RMII)
TI routes MAC-to-PHY (MII family) traces at 50 ohm single-ended, under 6 inches, matched within 20 mils for gigabit, and the PHY-side MDI pairs at 100 ohm differential. RGMII also needs a 1.5 to 2.0 ns clock-to-data delay, added on the board or inside the MAC or PHY (RGMII-ID); decide which before layout so it is not applied twice.
- Ethernet PHY PCB Design Layout ChecklistTexas Instruments, SNLA387, 2021
- PCB Design Guideline for RGMII InterfaceRenesas, R01AN6272EJ0141, 1.41, 2026
- i.MX28 Layout and Design GuidelinesNXP (Freescale), AN4215, 0, 2010
SATA
AC-coupled TX and RX pairs at 100 ohm differential in TI's SoC guide, routed with the same via, stub and reference plane rules as PCIe and USB 3. On Rockchip parts SATA usually shares a combo PHY with PCIe or USB 3, so the lane is routed once to whichever connector the design picks.
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
- High-Speed Layout Guidelines for Signal Conditioners and USB HubsTexas Instruments, SLLA414, A, 2026
Board-level design guides
Impedance and timing, power, thermal and ESD guidance that applies to any board around this chip.
Impedance and timing
Every high-speed interface on the board comes down to the same two numbers: the trace impedance your stackup actually gives, and the delay each trace adds. Set the stackup with your fab first, then route to its impedance table and match lengths in time, not millimeters, where the layers differ.
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
- PCB impedance calculatorGroundplane calculator
- PCB propagation delay calculatorGroundplane calculator
Power delivery
For each switching regulator, place and route the input capacitor first, keep the switching current loop small, and keep the switch node short. Give the SoC rails solid planes and decoupling at the balls, and size current-carrying copper and vias for the real load.
- Five steps to a great PCB layout for a step-down converterTexas Instruments, SLYT614, 2015
- AN-1149 Layout Guidelines for Switching Power SuppliesTexas Instruments, SNVA021, C, 2013
- AN-1229 SIMPLE SWITCHER PCB Layout GuidelinesTexas Instruments, SNVA054, C, 2013
- Buck converter calculatorGroundplane calculator
- LDO power dissipation calculatorGroundplane calculator
- PCB trace width calculatorGroundplane calculator
- Via current calculatorGroundplane calculator
Thermal
Theta-JA is measured on a JEDEC test board that carries most of the heat, so it does not transfer directly to a product board; use it to compare packages and use the psi metrics for estimates. Thermal vias under the package, copper area and copper thickness move the most heat into the board.
- Semiconductor and IC Package Thermal MetricsTexas Instruments, SPRA953, D, 2024
- AN-2020 Thermal Design By Insight, Not HindsightTexas Instruments, SNVA419, C, 2013
- Heatsink thermal resistance calculatorGroundplane calculator
- LDO power dissipation calculatorGroundplane calculator
ESD protection
Place the TVS as close to the connector as design rules allow, route from the connector to the TVS with no stub, and keep the protected IC further from the TVS than the TVS is from the connector. Choose parts by clamping performance and by capacitance low enough for the interface speed.
- ESD Protection Layout GuideTexas Instruments, SLVA680, A, 2022
- Reading and Understanding an ESD Protection Data SheetTexas Instruments, SLLA305, A
- TPD12S016 PCB Layout Guidelines for HDMI ESDTexas Instruments, SLLA324, 2012
- PCB conductor spacing calculator (IPC-2221)Groundplane calculator
Allwinner's hardware design guide
Allwinner's hardware design guide, EVB reference schematics and DDR templates come from Allwinner or an authorized agent, usually under NDA, or through your SoM vendor. We do not link copies circulating elsewhere. The vendor schematics and open designs on the Boards tab are real, shipped layouts on the T113 and the best public reference.
BSP, mainline and toolkits
| Area | Status | Links |
|---|---|---|
| Vendor BSP kernel | Allwinner Tina Linux (Tina5 SDK) with a Linux 5.4 kernel; the SDK carries board configs for t113, t113_i, t113_s3p, t113_s4, t113_s4p and t113s2. Allwinner distributes it through its developer platform; the copies on GitHub are 100ask mirrors. Forlinx ships Linux 5.4.61 for FET113i-S and MYIR Linux 5.4 for MYC-YT113i. The Tina-Linux GitHub organization linked from linux-sunxi is gone (404).Checked 2026-10-13 | |
| Mainline Linux | Shared D1/D1s/T113 dtsi in 6.3; sun8i-t113s.dtsi and the MangoPi MQ-R-T113 board in 6.4. Already upstream before that through the D1: USB PHY (5.18), display engine mixer, TCON and TCON TOP (5.19). Added later: CAN (6.6), GPADC (6.6), thermal sensor driver (6.8) with its device tree node and CPU thermal zone (7.0), NetCube Nagami SoM (6.18), watchdog reboot (7.2), DSI/LVDS output mux fix and NetCube OpenNMC (7.3-rc1). EMAC, MMC, SPI, I2C, UART, I2S, DMIC, LEDC and crypto have nodes. Not usable on mainline as of 7.3-rc7: the video engine (cedrus has had a D1 variant since 5.17 but no dtsi node exists), the audio codec, CVBS in and out, PWM, the HiFi4 DSP and any RISC-V core.Checked 2026-10-13 | |
| U-Boot | Mainline U-Boot supports T113-S3 since v2024.01 (DRAM init for R528/T113-s3/D1(s) and the mangopi_mq_r defconfig, built as MACH_SUN8I_R528). It is still the only T113 defconfig. There is no TF-A port for 32-bit sun8i parts. Alternatives: awboot (small bootloader for T113-S3 and V851s) and xboot (mach-r528s3).Checked 2026-10-13 | |
| DSP and RISC-V | The HiFi4 DSP and the C906 core are supported only through the Allwinner Tina BSP. Mainline has no remoteproc driver for either; the only related node is dsp_wdt. Community firmware: YuzukiHD/FreeRTOS-HIFI4-DSP builds FreeRTOS for the HiFi4 on R329, D1-H and T113 with GCC.Checked 2026-10-13 | |
| Distributions | Buildroot: mangopi_mq1rdw2_defconfig (first added as mangopi_mq1rdw1 in 2024.02), now on Linux 6.18.8 and U-Boot 2026.01. OpenWrt snapshot (not the 25.12 release) has a sun8i-t113s target with MangoPi MQDual T113, MYIR MYD-YT113X (eMMC and SPI), Rongpin RP-T113 and an "Olinuxino T113" device. Yocto meta-sunxi has a mangopi-mq-t-t113 machine. No Armbian T113 board.Checked 2026-10-13 | |
| Community | linux-sunxi wiki (T113-s3 page and family table), Allwinner developer forum bbs.aw-ol.com, 100ask DongshanPi docs, NetCube Nagami docs.Checked 2026-10-13 |
T113 system on modules
Any of these can sit on a carrier board we design.
| Module | Vendor | Connector | RAM | Design files | Price | Buy |
|---|---|---|---|---|---|---|
| MYC-YT113X | MYIR | 140-pin stamp hole, 1.0 mm pitch | 128 MB DDR3 in package (T113-S3) | Overview and pinout documents, 3D STEP; schematics on request | USD 14.8 (MYIR) | |
| MYC-YT113i | MYIR | 140-pin stamp hole plus 50-pin LGA | 512 MB or 1 GB DDR3 (T113-I) | Overview and pinout documents, 3D STEP; schematics on request | USD 26 (MYIR) | |
| FET113i-S | Forlinx | 146-pin half-hole (castellated), 1.0 mm pitch | 256 MB, 512 MB or 1 GB DDR3 (T113-I) | Carrier schematic, carrier PCB, DXF and pinmux sheet provided after purchase | ||
| SOM-TLT113 | Tronlong | 140-pin stamp hole (2x 30 plus 2x 40), 1.0 mm pitch | 128 MB to 1 GB DDR3 (T113-I) | Carrier schematic, PCB, footprint library and BOM, SoM pinout and 2D/3D, on application | ||
| CMT113 | Boardcon | 122 pins, 1.0 mm pitch | 128 MB (T113-S3) or 256 MB (T113-S4) in package | Hardware manual PDF and 3D model | ||
| ECK31 core boards | Ebyte | Stamp hole | 128 MB (T113-S3) or 256 MB (T113-S4) in package | |||
| ECK30 core boards | Ebyte | 46 x 36 x 5.3 mm | 256 MB, 512 MB or 1 GB (T113-I) | |||
| Nagami | NetCube Systems | Full-size mini PCIe card edge (NetCube CISEM) | 128 MB in package (T113-S3); 256 MB version in development | KiCad symbol only for the module; carrier boards published in full (see open designs) | USD 69.99 (Tindie) |
Every public T113 board
| Board | Vendor | Type | RAM | Notable I/O | Design files | Price | Buy |
|---|---|---|---|---|---|---|---|
| MangoPi MQ-R (T113) | Widora (MangoPi) | SBC, 30 x 45 mm | 128 MB DDR3 in package | USB-C OTG and USB-C host, 40-pin RGB LCD FPC, DVP, RTL8189F (MQ1RDW) or RTL8723DS (MQ1RDW2) Wi-Fi, microSD, 2x 18-pin headers | Schematic PDF (V1.0) and BOM (HTML) | ||
| MangoPi MQ-Dual | Widora (MangoPi) | SBC, 40 x 40 mm | 128 MB DDR3 in package (T113-S3) | 15-pin MIPI DSI, 40-pin RGB, DVP, RTL8189F Wi-Fi, 2x 22-pin headers | Schematic PDF (V1.6) | ||
| LCPI-PC-T113 | LC Technology | SBC, 85 x 55 mm | 128 MB DDR3 in package (also sold as an F133/D1s version) | RGB LCD FPC, MIPI DSI, DVP, RTL8189F Wi-Fi, 2x USB-C, BOOT and FEL buttons | Schematic PDF in the vendor Google Drive folder | ||
| 100ASK T113s3-Pro | 100ask (DongshanPi) | Dev kit | 128 MB DDR3 in package (T113-S3) | 10/100 Ethernet, RS485 and CAN on terminals, RGB LCD, DVP, CVBS in, XR829 or AIC8800 Wi-Fi, 12 V input | Core board schematic PDF (V1.2, partial), carrier schematic and placement PDFs (V1.3), Altium footprint library for the core board | ||
| 100ASK T113s3-SdNand / T113s4-SdNand | 100ask (DongshanPi) | Dev kit | 128 MB (S3) or 256 MB (S4) in package | SD NAND (4 GB on the S4 version), Same V1.3 carrier as T113s3-Pro | |||
| 100ASK T113-i Industrial DevKit | 100ask (DongshanPi) | Dev kit | GbE, RS485, CAN, CVBS camera, MIPI to HDMI | Carrier schematic and placement PDFs, core board schematic and placement PDFs | |||
| MYD-YT113X | MYIR | Dev kit, 110 x 90 mm | GbE, 2x USB host and OTG, M.2 for 4G/5G, Wi-Fi, Single and dual LVDS, CAN and UART header | USD 55 (MYIR) | |||
| MYD-YT113i | MYIR | Dev kit | USD 62 (MYIR) | ||||
| MY-EVC700S-V2 gateway | MYIR | SBC, Enclosed, 194 x 158 x 32.5 mm | 512 MB DDR3 (T113-I) | 2x RS232, 2x isolated RS485, 2x isolated CAN, 10/100 Ethernet, 4G (Quectel EC200M), Wi-Fi, BT, LVDS | |||
| OK113i-S | Forlinx | SBC | GbE, 2x isolated CAN, 2x isolated RS485, mini PCIe 4G with nano-SIM, Wi-Fi, BT, LVDS, RGB, TV in and out | Carrier schematic and PCB provided after purchase | |||
| TLT113-EVM | Tronlong | Dev kit, 120 x 190 mm | GbE plus 10/100 via USB hub, 2x CAN, 2x RS485, RS232, LVDS, RGB, MIPI, HDMI via bridge, mini PCIe 4G | ||||
| TLT113-MiniEVM | Tronlong | Dev kit, 57 x 87 mm | GbE, USB-C OTG, USB-A, HDMI, CAN, SPI, UART on expansion header | ||||
| EMT113 | Boardcon | SBC, 130 x 85 mm | GbE (RTL8211F), Wi-Fi, BT 4.2, mini PCIe 4G, RS232, RS485, RGB, MIPI, dual LVDS, TV in and out | Hardware manual, Linux user manual, overview diagram | |||
| ECB31-P4T13SA2ME8G | Ebyte | SBC, 85 x 56 mm, Raspberry Pi layout | 256 MB in package (T113-S4) | 8 GB eMMC, ECK31 core board soldered on | USD 73.00 (Tindie) | ||
| Nagami Basic Carrier | NetCube Systems | Carrier | Full KiCad project, PDF, BOM, iBOM, positions, IPC netlist | ||||
| ARMxy BL330 series | BLIIOT | SBC, DIN-rail industrial computer | 256 MB to 1 GB DDR3 (T113-I) | 1 to 3x 10/100 Ethernet, HDMI on some models, DI/DO and RS485 I/O boards | |||
| EdgePLC BL233 | BLIIOT | SBC, DIN-rail gateway | 256 MB to 1 GB DDR3 (T113-I) | 2x 10/100 Ethernet (3 on BL233A), 2x RS485 or RS485 plus CAN |
Prices and links as checked on the dates in our data; the latest check on this page was 2026-10-13. Amazon links marked * are affiliate links; see our disclosure.
Boards with published design files
| Project | Author | Files | Tool | License |
|---|---|---|---|---|
| Trellis Core (T113-S4 minimal core) | Protolux Electronics | KiCad schematic (8 sheets), KiCad PCB, KiCad project, STEP model | KiCad | CERN-OHL-P-2.0 |
| Wisteria e-ink badge (T113-S4) | Protolux Electronics | KiCad schematic sheets, KiCad PCB, Case STEP | KiCad | CERN-OHL-S-2.0 |
| TinyEmbedded-Dual (T113-S3 or F133/D1s) | yuansco | Altium project, 4 schematic sheets (SchDoc), 2 PCBs (PcbDoc), Gerber zip, BOM CSV, Schematic PDF | Altium | None stated in the repository |
| underglow3 main board (T113-S3) | Connor Rigby | KiCad schematic (T113-S3, power, Wi-Fi sheets), KiCad PCB and project, Gerbers for JLCPCB | KiCad | Apache-2.0 (repository license) |
| Nagami Basic Carrier | NetCube Systems | KiCad schematic, PCB and project, Schematic PDF, BOM and interactive BOM, Positions CSV, IPC netlist | KiCad | None stated in the repository |
| TESS, Feather-format T113-S3 board | phyx-be | Gerbers, ODB++, BOM (XLS), Pick and place CSV, Schematic PDF | Other | MIT |
| T113 IoT Station (T113-S3) | fEndman | EasyEDA Pro project (.eprj), Schematic PDF, PCB and case STEP | EasyEDA | None stated in the repository |
| T113 minimal carrier for a Modbus HMI | PuWang-24 | EasyEDA Pro project (.epro), Gerber zip, BOM XLSX, Pick and place XLSX | EasyEDA | None stated in the repository |
Buying the chip
No Mouser or DigiKey listing for the bare chip was found. Allwinner does not publish a distributor list on its product page. Module vendors (MYIR, Forlinx, Tronlong, Ebyte, Boardcon) sell SoMs, not chips.
- LCSC, T113-S3
- C5197687, ELQFP-128, 1,729 in stock; USD 22.443 at 1, 20.6158 at 10, 19.7359 at 30, 18.4209 at 90 (tray of 90). A third-party offer on the same page lists 258 pieces from USD 14.1169.
- LCSC, T113-I
- C7545092, BGA-337 13 x 13 mm, 163 in stock; USD 6.3548 at 1, 5.3946 at 10, 4.8109 at 30, 4.3193 at 119 (tray of 119). No datasheet attached to the listing.
- JLCPCB parts library, T113-S4
- C5444671 (AllwinnerTech T113s4), ELQFP-128, extended part; no stock or price shown. LCSC has no product page for it.
Datasheet, TRM and design documents
Linked where they are publicly hosted; we do not rehost Allwinner documents. These are third-party documents: we are not responsible for their accuracy, availability or confidentiality status. Disclosure.
- DatasheetAllwinner T113-S3 DatasheetV2.0 · 2023-05-11 · hosted by LCSC · checked 2026-10-13
- DatasheetAllwinner T113-S3 DatasheetV1.6 · 2022-03-03 · hosted by Widora (MangoPi) · checked 2026-10-13
- DatasheetAllwinner T113-S3 DatasheetV1.2 · 2021-09-02 · hosted by Widora (MangoPi) · checked 2026-10-13
- TRMAllwinner T113-S3 User ManualV1.3 · 2022-03-03 · hosted by Widora (MangoPi) · checked 2026-10-13
- TRMAllwinner T113-S3 User ManualV1.1 · 2021-08-30 · hosted by Allwinner developer forum (bbs.aw-ol.com) · checked 2026-10-13
- Product briefAllwinner T113-S3 Briefhosted by Widora (MangoPi) · checked 2026-10-13
- OtherT113 product page (Chinese)hosted by Allwinner · checked 2026-10-13
- DatasheetAllwinner T113-i DatasheetV1.4 · 2022-06-30 · hosted by Allwinner developer forum (bbs.aw-ol.com) · checked 2026-10-13
- TRMAllwinner R528 User Manual (R528-S2, R528-S3)Rev 1.3 · 2021-11-02 · hosted by Allwinner developer forum (bbs.aw-ol.com) · checked 2026-10-13
- Board schematicMangoPi MQ-R schematic (T113, SY8008 bucks)V1.0 · hosted by Widora (MangoPi) · checked 2026-10-13
- Board schematicMangoPi MQ-Dual schematic (T113-S3)V1.6 · hosted by Widora (MangoPi) · checked 2026-10-13
- OtherForlinx FET113i-S SoM and OK113i-S SBC brief (T113-I, C906 and HiFi4 clocks)hosted by Forlinx · checked 2026-10-13
- OtherMYIR MYD-YT113i datasheet (T113-I board)hosted by MYIR · checked 2026-10-13
- OtherMainline device tree: MangoPi MQ-R common (regulators)hosted by kernel.org · checked 2026-10-13
- Otherlinux-sunxi T113-s3 page with the T113 family tablehosted by linux-sunxi · checked 2026-10-13
Questions about the T113
Not the T113 itself. We have designed and brought up boards on the Allwinner T507 and A527/T527, and on the Rockchip RV1106, RV1126, RV1126B, RK3566, RK3568, RK3576 and RK3588. The work carries over: power tree, DDR and high-speed layout, bring-up and the BSP, read against this chip's own datasheet.
The newest revision found is V2.0 (2023-05-11), attached to the LCSC listing. MangoPi's host has V1.6 and V1.2, and the T113-S3 User Manual V1.3 (2022-03-03); Allwinner's developer forum hosts User Manual V1.1. The T113-i Datasheet V1.4 and the R528 User Manual Rev 1.3 are on the same Allwinner forum. No T113-S4 datasheet is hosted anywhere we could find.
T113-S3 has 128 MB DDR3 inside an eLQFP128 and decodes to 1080p60. T113-S4 is the same package with 256 MB (Allwinner lists 64, 128 and 256 MB options; linux-sunxi adds a C906 RISC-V core, not confirmed in an Allwinner document). T113-I is a 13 x 13 mm BGA337 with external DDR2/DDR3 up to 2 GB, a RISC-V core, 4K30 H.265 decode and a -40 to 85 C ambient rating.
R528 has the same CPU, DSP and video engine but comes in a 12 x 12 mm LFBGA226 and its manual lists no CAN or CVBS, so it is not footprint compatible; mainline U-Boot uses MACH_SUN8I_R528 for the T113. D1s/F133 share the eLQFP128 with a single C906 RISC-V core instead of the Cortex-A7s and 64 MB DDR2; linux-sunxi describes it as pin compatible apart from CAN, and boards such as MangoPi MQ-R ship in both versions.
Good for a headless or simple display controller: the SoC and MangoPi MQ-R landed in Linux 6.4, CAN and GPADC in 6.6, the thermal sensor node in 7.0, and mainline U-Boot boots it since v2024.01. Missing on mainline: hardware video decode (no device tree node), the audio codec, CVBS in and out, PWM, the HiFi4 DSP and the RISC-V core. Those need Allwinner's Tina Linux 5.4 BSP.
No Allwinner datasheet or user manual we opened states one. Widora quotes up to 1 GHz for the MangoPi T113 boards; Forlinx and MYIR quote 1.2 GHz for T113-I modules, and linux-sunxi lists 1.0 to 1.1 GHz for S4 variants without a source. Mainline U-Boot runs the in-package DRAM at 792 MHz.
For T113-S3/S4: MYIR MYC-YT113X (140-pin stamp hole, USD 14.8), Boardcon CMT113, Ebyte ECK31 and NetCube Nagami (mini PCIe card edge, USD 69.99). For T113-I: Forlinx FET113i-S (146-pin castellated), MYIR MYC-YT113i (stamp hole plus LGA, USD 26), Tronlong SOM-TLT113 and Ebyte ECK30. None of these vendors publishes module layout files.
Related chips and reading
- D1 / D1sRISC-V Linux learning boards, HMI panels, digital frames, small display and audio products
- V853 / V851AI IP cameras, door locks, access control
- RK3308Smart speakers, mic arrays, audio bridges, gateways
- RK3128 / RK3126TV boxes, tablets, low-cost HMIs
- RV1106 / RV1103Small AI cameras, tiny Linux nodes, IP KVMs
- H618 / H616Pi Zero class SBCs, CM4-style 3D-printer SoMs, TV boxes, retro handhelds (H700)
- A133 / R818Tablets, HMI panels, smart displays, handhelds
We'll design your T113-S3 board.
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Links and facts on this page checked 2026-10-13. Spotted something out of date? Tell us through the contact form.
Compiled from publicly available sources: datasheets, technical reference manuals, vendor product pages, schematics and source code published by their owners and third parties. We link to documents where others host them and do not host, endorse or vouch for them. Everything on these pages, including our own specs, summaries, block diagrams, comparisons, calculators and design notes, is for reference only and may contain errors or be out of date. It is provided as is, and Groundplane is not responsible for errors in it, for third-party documents, or for any design, board or decision based on it. Always check the manufacturer's current datasheet, reference manual and design guidance before you design a board. Rockchip, Allwinner, Raspberry Pi and other product names are trademarks of their owners; we are not affiliated with any of them. See our disclosure.