RK3128 / RK3126
Low-cost 32-bit quad Cortex-A7 from 2014 for TV boxes, entry tablets and simple HMIs: 1080p60 H.265/H.264 decode, HDMI 1.4 and LVDS/MIPI DSI, DDR3 up to 2 GB, no NPU, no PCIe, USB 2.0 only.
- CPU
- 4x Cortex-A7
- GPU
- Mali-400 MP2
- NPU
- None
- Video
- 1080p60 H.265/H.264 decode, 1080p30 H.264 encode
- PCIe
- None
What the RK3128 / RK3126 is for
Right for
- Cost-floor HDMI players and signage boxes that only need 1080p60 H.265 or H.264 playback
- Simple HMIs with a 720p LVDS or 4-lane MIPI DSI panel, 512 MB to 1 GB of DDR3 and eMMC
- Maintaining or refreshing an existing RK3128 product: the part is still listed at LCSC and Boardcon still lists its CM3128 module
- DVB or IPTV receivers: a TS input with CSA v2.0 descrambling and an ISO-7816 smart card interface are on chip
- Retro-handheld style devices with a MIPI panel and battery, where the RK818 PMIC (charger plus fuel gauge) is the usual pairing
Wrong for
- Any AI or vision workload: no NPU, and the camera input is an 8-bit DVP port only
- Anything needing PCIe, USB 3.0, SATA or NVMe: the chip has none of them
- 4K output or decode: HDMI and the decoders top out at 1080p
- New 64-bit Linux products: the cores are 32-bit Armv7-A, so arm64 distributions and many vendor SDKs do not apply
- Designs that need more than 2 GB of RAM or modern LPDDR4: the controller is DDR3/DDR3L/LPDDR2 with 2 GB addressing
Cost and constraints
- The newest public datasheet (Rev 1.2, Jul 2017) rates the CPU at 1.2 GHz and the GPU at 400 MHz but still leaves the core voltage limits as TBD; size the CPU rail from the mainline OPP table (up to 1.325 V at 1.2 GHz)
- Only a partial TRM (28 chapters, community mirror) is public; no hardware design guide or reference schematic is publicly hosted, so layout knowledge comes from vendor manuals and the datasheet guideline chapter
- USB OTG and USB host share one PHY, and the video decoder and encoder cannot run at the same time (shared internal buffer)
- Mainline Linux covers most blocks since 6.12, but the H.265 decoder has no mainline driver; Rockchip's vendor kernel stops at 4.4
- Public boards are few and mostly end of life; Boardcon and Geniatech are the vendors still listing hardware
Inside the RK3128 / RK3126
Drawn by Groundplane from the datasheet rev 1.2. Not Rockchip artwork.
- 32-bit DDR3/DDR3L-1066
- LPDDR2-800, 2 GB max
- eMMC 4.5 (8-bit)
- SD 2.0
- 8-bit NAND, SPI boot
- 4x Cortex-A7, NEON/FPU
- 32 KB L1 I/D per core
- 256 KB shared L2
- Mali-400 MP2
- OpenGL ES 2.0, OpenVG 1.1
- 2D engine (RGA)
- 1080p60 H.265/H.264 decoder
- 1080p30 H.264/VP8 encoder
- JPEG decode and encode
- IEP deinterlace and scaler
- LCDC, 4 layers incl. cursor
- TV encoder (CVBS)
- AES/DES/SHA crypto, PKA
- PRNG
- 2x 512-bit eFuse
- 24 MHz osc, 4 PLLs
- PMU, 3 power domains
- 6 timers, watchdog, DMAC
- 16 KB BootROM, 8 KB SRAM
- USB 2.0 OTG
- USB 2.0 host (shared PHY)
- GMAC RGMII/RMII
- SDIO 3.0
- HDMI 1.4a TX
- LVDS or MIPI DSI, 4 lanes
- Parallel RGB 24-bit
- CVBS out
- 8-bit DVP camera
- 3x UART, 4x I2C, SPI
- 4x PWM, 3x SARADC
- TS in, smart card
- I2S 8ch + 2ch, SPDIF, codec
Read from the documents
Each value names the document it was read from.
| CPU | 4x Arm Cortex-A7 (Armv7-A), NEON and FPU per core, 32 KB/32 KB L1 I/D per core, 256 KB unified L2 | Datasheet Rev 1.2, 1.1.2 |
|---|---|---|
| CPU clock | CPU 0.2 to 1.2 GHz, GPU 100 to 400 MHz (Rev 1.2; Rev 0.6 said TBD). Core voltage limits still TBD; the mainline device tree tops out at 1200 MHz at 1.325 V | Datasheet Rev 1.2, Table 3-2 |
| GPU | Arm Mali-400 MP2, OpenGL ES 1.1/2.0, OpenVG 1.1, 32 KB GPU L2 | Datasheet Rev 1.2, 1.1.10 |
| NPU | None | Datasheet Rev 1.2 |
| Video decode | H.265 MP L4.1 and H.264 HP L4.2 1080p60; MPEG-1/2/4, VP8 and MVC 1080p60; VC-1 AP L3 1080p30; H.263 576p60 | Datasheet Rev 1.2, 1.1.7 |
| Video encode | H.264 up to HP L4.1, MVC and VP8, I and P slices only, up to 1920x1080 at 30 fps. Decoder and encoder cannot run simultaneously | Datasheet Rev 1.2, 1.1.7, notes to 1.1.17 |
| JPEG | Decode 48x48 to 8176x8176; encode 96x32 to 8192x8192 | Datasheet Rev 1.2, 1.1.8 |
| Memory | 32-bit DDR3/DDR3L-1066 or LPDDR2-800, 2 ranks, 2 GB maximum address space; 8-bit async/toggle/sync NAND with up to 60-bit ECC | Datasheet Rev 1.2, 1.1.3, 1.1.5 |
| Storage | eMMC 4.5 (8-bit), SD 2.0 (4-bit), SDIO 3.0 (4-bit), NAND; boot from NAND, SPI, eMMC or SD | Datasheet Rev 1.2, 1.1.4, 1.1.5, 1.1.16 |
| Display | HDMI 1.4a TX up to 1080p60 with HDCP 1.4 and CEC; 4-lane MIPI DSI up to 1080p60; LVDS up to 135 MHz (XGA, single-pixel SXGA); parallel RGB up to 24-bit; CVBS 480i/576i. LVDS, MIPI DSI and e-paper (EBC) share the LCDC data pins | Datasheet Rev 1.2, 1.1.11 to 1.1.14, 2.5 |
| Camera | 8-bit DVP (CCIR656 or raw), up to 5 MP; no MIPI CSI | Datasheet Rev 1.2, 1.1.11 |
| PCIe | None | Datasheet Rev 1.2 |
| USB | 1x USB 2.0 OTG and 1x USB 2.0 host, sharing one PHY | Datasheet Rev 1.2, 1.1.16, 4.3 |
| Ethernet | 1x GMAC: RGMII 10/100/1000 or RMII 10/100 | Datasheet Rev 1.2, 1.1.16 |
| Audio | 8-channel I2S/PCM, 2-channel I2S/PCM, SPDIF out, integrated codec with line-in, mic-in and 16 to 32 ohm headphone/speaker out | Datasheet Rev 1.2, 1.1.15 |
| Other I/O | 3x UART, 4x I2C, 1x SPI (2 CS), 4x PWM, 3-channel 10-bit SARADC, TS input with CSA v2.0 descrambling, ISO-7816 smart card, 128 GPIO | Datasheet Rev 1.2, 1.1.6, 1.1.16, 1.1.17 |
| Security | AES-128/192/256, DES/3DES, SHA-1/SHA-256/MD5, PRNG, PKA up to 2048-bit; two 512-bit eFuse arrays | Datasheet Rev 1.2, 1.1.6, 1.1.17 |
| Core supplies | Logic and CPU 1.1 V typical (limits TBD); USB, HDMI and PLL digital 0.99 to 1.21 V; GPIO banks 3.3 V; DDR IO 1.5 V (DDR3) or 1.35 V (DDR3L) | Datasheet Rev 1.2, Table 3-2 |
| Temperature | 0 to 80 C ambient (Rev 1.2; reference software limits the die to about 80 C). Rev 0.6 said -40 to +85 C | Datasheet Rev 1.2, Table 3-2 |
| Thermal | Junction below 125 C. Simulated on a 4-layer 90 x 90 mm board: 4.5 W power dissipation listed, theta-JA 20.23, theta-JB 9.6, theta-JC 11.6 C/W | Datasheet Rev 1.2, 5.1, Table 5-1 |
| Package | TFBGA316, 14 x 14 mm body, 0.3 mm balls, 0.65 mm pitch; package quantity 1190 | Datasheet Rev 1.2, 1.1.17, 2.1 |
Variants
| RK3128 | The full part and the subject of this page: 32-bit DDR3/LPDDR2 up to 2 GB, HDMI 1.4, GMAC, CVBS, TS input, TFBGA316. Every public SBC and SoM found uses it. | Datasheet Rev 1.2 |
|---|---|---|
| RK3126 | Tablet part in LQFP176 (20 x 20 mm). 16-bit DDR3/DDR3L-1066 with 1 GB maximum; MIPI DSI 4-lane, LVDS and RGB (LVDS/RGB scaler up to 1280x800); H.264 encode 1080p25; 2x UART, 3x I2C. The datasheet lists no HDMI and no GMAC, and Linux keeps the HDMI clock RK3128-only. Same quad Cortex-A7 and Mali-400 MP2. | Datasheet Rev 1.0 |
| RK3126C | Later tablet part (datasheet V1.0 May 2017, V1.1 Nov 2019), also LQFP176, 600 per tray. 16-bit DDR3/DDR3L-800 with 2 GB maximum; MIPI DSI 4-lane and LVDS; H.264 encode only up to 1280x720 at 30 fps; 2x UART, 3x I2C, 1x SPI; no HDMI or Ethernet listed. | Datasheet Rev 1.1 |
What to watch when you design with it
Power and PMIC
Two public patterns exist. Firefly-RK3128 uses the RK818 PMIC (four bucks at up to 4 A and 2.5 A, a boost, LDOs, Li-ion charger up to 3 A and fuel gauge, QFN68 7 x 7 mm), which suits battery devices. The Geniatech XPI-3128 mainline device tree and the Boardcon CM3128 manual describe discrete power instead: on the XPI-3128, VDD_ARM (0.9 to 1.4 V) and VDD_LOG are PWM-controlled regulators on PWM1 and PWM2, with fixed 1.5 V DDR, 1.1 V and 3.3 V rails, and the device tree holds VDD_LOG at 1.05 V minimum because some logic blocks have no voltage handling. The CM3128 takes a single 3.3 V input at up to 1.5 A. Alex Bee notes RK3126 tablets use the RK816 PMIC.
Sources: PMIC Rev 1.1, PMIC Rev 1.3, Other V1.0, Other v7.3-rc7, Other V2.202107, Other
DDR
One 32-bit channel on the RK3128 (16-bit on the RK3126 and RK3126C), DDR3/DDR3L-1066 or LPDDR2-800, 2 ranks, 2 GB addressing. DDR_VDD is 1.5 V for DDR3 and 1.35 V for DDR3L. Every public board uses DDR3 at 512 MB to 2 GB. Rockchip ships the DDR init blob rk3128_ddr_300MHz_v2.12.bin in rkbin. No public DDR routing guide was found; the Boardcon CM3128 does it on a 6-layer PCB.
Sources: Datasheet Rev 1.2, Datasheet Rev 1.0, Datasheet Rev 1.1, Other, Other V2.202107
High-speed interfaces
There is no PCIe, USB 3.0 or SATA, so the fastest external signals are DDR3, HDMI TMDS and the LVDS/MIPI DSI lanes. The datasheet asks for USB pairs routed together with few vias, a single unbroken ground plane under them on layer 2, and no stubs; it specifies 100 ohm differential, where USB 2.0 is nominally 90 ohm, so confirm the target with your stackup. HDMI DDC and CEC tolerate 5 V directly, so no level shifters are needed; ESD parts go at the connector. The LVDS/MIPI DSI PHY shares pins with LCDC data bits 0 to 9, so a design gets either the serial panel interface or full 24-bit parallel RGB.
Boot and maskrom
The BootROM boots from 8-bit NAND, SPI, eMMC or SD, and falls back to USB download on the OTG port. Firefly documents three modes: Loader mode (hold RECOVERY while connecting micro USB OTG), and MaskRom mode by shorting the eMMC data test points on the core board with tweezers while powering up. Boardcon routes a RECOVER button to ADCIN1. Mainline U-Boot supports evb-rk3128 but, unlike other Rockchip SoCs, without SPL, so it still relies on Rockchip's rkbin DDR blob and miniloader.
Sources: Datasheet Rev 1.2, wiki.t-firefly.com, wiki.t-firefly.com, Other V2.202107, Other
Thermal
Rev 1.2 sets the junction limit at 125 C, rates ambient at 0 to 80 C and gives simulated theta-JA 20.23 C/W on a 4-layer 90 x 90 mm board, with 4.5 W listed as power dissipation. The older Rev 0.6 rated operation at -40 to +85 C and characterized the clocks at 0.99 V and 125 C as the worst corner (Cortex-A7 790 MHz there). Boardcon rates its CM3128 module at 0 to 70 C.
Sources: Datasheet Rev 1.2, Datasheet Rev 0.6, Other V2.202107
Gotchas
Rev 0.6 lists VP6, RealVideo and Sorenson Spark decode; Rev 1.2 drops them, raises H.264 encode from 1080p25 to 1080p30, narrows ambient to 0 to 80 C and sets the CPU maximum at 1.2 GHz, so design to Rev 1.2. Firefly advertises 1.3 GHz, above the datasheet rating; Boardcon and Geniatech say 1.2 GHz. The mainline VPU node is the older Hantro (rk3066-compatible) block, so the H.265 decoder only works with the vendor kernel and Rockchip MPP. The RK3126 and RK3126C are not drop-ins: LQFP176, 16-bit DDR3, no HDMI.
Sources: Datasheet Rev 1.2, Datasheet Rev 0.6, Other V1.0, Other v7.3-rc7, Other, Datasheet Rev 1.0
Layout guides for the RK3128 / RK3126's interfaces
Public layout guidance for each interface this chip has, from vendors who publish it, plus our calculators.
DDR3 / DDR3L
Fly-by command/address with termination at the end of the chain, point-to-point data lanes matched to their strobe, and a clean VREF. ST recommends 55 ohm single-ended and 100 ohm differential for DDR3 and DDR3L on STM32MP1 boards, and shows that a 4-layer board is possible with strict layer allocation.
- STM32MP1 Series DDR memory routing guidelinesSTMicroelectronics, AN5122, 3, 2019
- DDR3 Design Requirements for KeyStone DevicesTexas Instruments, SPRABI1, D, 2022
- SL2610 General PCB Design and DDR3L/DDR4 & LPDDR4(x) Interface Layout GuidelinesSynaptics, PN 506-001629-01, A, 2025
- DDR length matching calculatorGroundplane calculator
eMMC
A single-ended bus: CLK, CMD, DAT0 to DAT7 and, for HS400, the data strobe. TI and Synaptics both route it at 50 ohm single-ended, match the group, and keep stubs short; Synaptics places a 22 or 33 ohm series resistor on CLK and STRB. At HS400 TI also checks the eMMC I/O supply impedance, not just the traces.
- AM62Px eMMC HS400 Board Design and Simulation GuidelinesTexas Instruments, SPRADP5, A, 2026
- Astra Machina Foundation Series eMMC ConfigurationSynaptics, PN 506-001594-01, D
- i.MX28 Layout and Design GuidelinesNXP (Freescale), AN4215, 0, 2010
SD card / SDIO
Single-ended CLK, CMD and four data lines over a solid ground plane, at constant trace width and matched length. NXP asks for clock-to-neighbor spacing greater than twice the trace height above the plane and 1.5 times for data and CMD, with 45 degree bends. UHS modes switch the I/O to 1.8 V, so a level translator often sits next to the socket.
- NVT4557/NVT4558/NVT4858 voltage-level translator layout guidelineNXP, AN13158, 1.1, 2022
- i.MX28 Layout and Design GuidelinesNXP (Freescale), AN4215, 0, 2010
- SD Physical Layer Simplified SpecificationSD Association, 9.10, 2023
PCIe
AC-coupled differential lanes routed with no stubs, minimal vias and back-drilled or blind vias where speed demands, with lane-to-lane skew handled by the receiver. Targets differ by guide: TI Jacinto 7 uses 85 ohm differential for lanes and 100 ohm for the reference clock, while TI's earlier SoC guide tabulates 100 ohm and, for some devices, 95 ohm. Match the target to your connector and stackup.
- Jacinto7 AM6x, TDA4x, and DRA8x High-Speed Interface Design GuidelinesTexas Instruments, SPRACP4, A, 2024
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
USB 2.0
One D+/D- pair at 90 ohm differential, routed in parallel for its whole length with minimal deviations at the connector and package. NXP keeps clocks and periodic signals at least 50 mils away and other signals at least 20 mils away from the pair.
- High-Speed Layout Guidelines for Signal Conditioners and USB HubsTexas Instruments, SLLA414, A, 2026
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
- i.MX28 Layout and Design GuidelinesNXP (Freescale), AN4215, 0, 2010
HDMI
Four TMDS pairs (three data, one clock) at 100 ohm differential, as both TI guides state, with tight intra-pair matching and as few vias as possible between the SoC and the connector. HDMI also needs 5 V supply switching, DDC and CEC level handling, hot-plug detect and ESD at the connector.
- High-Speed Layout Guidelines for Signal Conditioners and USB HubsTexas Instruments, SLLA414, A, 2026
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
- TPD12S016 PCB Layout Guidelines for HDMI ESDTexas Instruments, SLLA324, 2012
MIPI DSI
MIPI D-PHY clock and data lanes are routed as 100 ohm differential pairs over a solid reference; TI Jacinto 7 allows no stubs, 2 vias per trace and 40 ps lane-to-lane skew. Connectors and flex cables to the panel are usually the largest discontinuity, so keep the board segment short and clean.
- Jacinto7 AM6x, TDA4x, and DRA8x High-Speed Interface Design GuidelinesTexas Instruments, SPRACP4, A, 2024
- PCB Design Guidelines (HSSI, EMIF, MIPI, True Differential, PDN) User Guide: Agilex 5 FPGAs and SoCsAltera, 821801, 2026
MIPI CSI-2
Same D-PHY rules as DSI: 100 ohm differential lanes in both TI guides, with lane-to-lane skew bounded (40 ps in TI Jacinto 7). Size the lane count and lane rate from the sensor's output format before routing.
- Jacinto7 AM6x, TDA4x, and DRA8x High-Speed Interface Design GuidelinesTexas Instruments, SPRACP4, A, 2024
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
- PCB Design Guidelines (HSSI, EMIF, MIPI, True Differential, PDN) User Guide: Agilex 5 FPGAs and SoCsAltera, 821801, 2026
- MIPI CSI-2 bandwidth calculatorGroundplane calculator
LVDS
Tightly coupled differential pairs terminated at the receiver in 100 ohm, with TI's EMI guide asking for 100 ohm differential traces within 5 percent. Keep pairs matched and away from other aggressors, and avoid stubs and reference plane gaps along the route to the panel connector.
- LVDS Owner's Manual: Including High-Speed CML and Signal ConditioningTexas Instruments, SNLA187, 4th edition, 2008
- High-Speed Layout Guidelines for Reducing EMI for LVDS SerDes DesignsTexas Instruments, SNLA302, 2018
- LVDS SerDes Gen I PCB and Interconnect Design-In GuidelinesTexas Instruments, SNLA008, A, 2018
Ethernet (RGMII / RMII)
TI routes MAC-to-PHY (MII family) traces at 50 ohm single-ended, under 6 inches, matched within 20 mils for gigabit, and the PHY-side MDI pairs at 100 ohm differential. RGMII also needs a 1.5 to 2.0 ns clock-to-data delay, added on the board or inside the MAC or PHY (RGMII-ID); decide which before layout so it is not applied twice.
- Ethernet PHY PCB Design Layout ChecklistTexas Instruments, SNLA387, 2021
- PCB Design Guideline for RGMII InterfaceRenesas, R01AN6272EJ0141, 1.41, 2026
- i.MX28 Layout and Design GuidelinesNXP (Freescale), AN4215, 0, 2010
Board-level design guides
Impedance and timing, power, thermal and ESD guidance that applies to any board around this chip.
Impedance and timing
Every high-speed interface on the board comes down to the same two numbers: the trace impedance your stackup actually gives, and the delay each trace adds. Set the stackup with your fab first, then route to its impedance table and match lengths in time, not millimeters, where the layers differ.
- High-Speed Interface Layout GuidelinesTexas Instruments, SPRAAR7, J, 2023
- PCB impedance calculatorGroundplane calculator
- PCB propagation delay calculatorGroundplane calculator
Power delivery
For each switching regulator, place and route the input capacitor first, keep the switching current loop small, and keep the switch node short. Give the SoC rails solid planes and decoupling at the balls, and size current-carrying copper and vias for the real load.
- Five steps to a great PCB layout for a step-down converterTexas Instruments, SLYT614, 2015
- AN-1149 Layout Guidelines for Switching Power SuppliesTexas Instruments, SNVA021, C, 2013
- AN-1229 SIMPLE SWITCHER PCB Layout GuidelinesTexas Instruments, SNVA054, C, 2013
- Buck converter calculatorGroundplane calculator
- LDO power dissipation calculatorGroundplane calculator
- PCB trace width calculatorGroundplane calculator
- Via current calculatorGroundplane calculator
Thermal
Theta-JA is measured on a JEDEC test board that carries most of the heat, so it does not transfer directly to a product board; use it to compare packages and use the psi metrics for estimates. Thermal vias under the package, copper area and copper thickness move the most heat into the board.
- Semiconductor and IC Package Thermal MetricsTexas Instruments, SPRA953, D, 2024
- AN-2020 Thermal Design By Insight, Not HindsightTexas Instruments, SNVA419, C, 2013
- Heatsink thermal resistance calculatorGroundplane calculator
- LDO power dissipation calculatorGroundplane calculator
ESD protection
Place the TVS as close to the connector as design rules allow, route from the connector to the TVS with no stub, and keep the protected IC further from the TVS than the TVS is from the connector. Choose parts by clamping performance and by capacitance low enough for the interface speed.
- ESD Protection Layout GuideTexas Instruments, SLVA680, A, 2022
- Reading and Understanding an ESD Protection Data SheetTexas Instruments, SLLA305, A
- TPD12S016 PCB Layout Guidelines for HDMI ESDTexas Instruments, SLLA324, 2012
- PCB conductor spacing calculator (IPC-2221)Groundplane calculator
Rockchip's hardware design guide
Rockchip's hardware design guide, EVB reference schematics and DDR templates come from Rockchip or an authorized agent, usually under NDA, or through your SoM vendor. We do not link copies circulating elsewhere. The vendor schematics and open designs on the Boards tab are real, shipped layouts on the RK3128 / RK3126 and the best public reference.
BSP, mainline and toolkits
| Area | Status | Links |
|---|---|---|
| Vendor BSP kernel | Rockchip's vendor kernel supports RK3126, RK3126C and RK3128 only on develop-4.4 (rk312x.dtsi plus EVB, box and FirePrime device trees); develop-4.19, 5.10 and 6.1 have no RK312x device trees. Boardcon ships Linux 3.10.104 with Android 7.1 on CM3128/EM3128 and Linux 3.10.0 with Android 6.0 on Compact3128.Checked 2026-10-13 | |
| Mainline Linux | rk3128.dtsi and the RK3128 EVB in 6.3; SMP bring-up and CPU OPPs in 6.7; GMAC, USB fixes, power domains, Mali-400 GPU (Lima) and the Geniatech XPI-3128 in 6.8; VOP display subsystem and HDMI (inno-hdmi) in 6.9; MIPI DSI and D-PHY, I2S, SPDIF and SFC in 6.11; Hantro VPU (H.264/VP8/MPEG-2 class, rk3066-compatible) in 6.12. The H.265 decoder is not described. RK3126 has clock driver support only; a proposed RK3126/RK3128 device tree split did not land, and as of 7.3-rc7 there is no RK3126 board.Checked 2026-10-13 | |
| U-Boot | Mainline U-Boot has evb-rk3128_defconfig, switched to the upstream device tree in June 2026 (first released in v2026.07). RK3128 is the one Rockchip platform that does not use U-Boot SPL, so DDR init and loading use Rockchip's rkbin blobs (rk3128_ddr_300MHz_v2.12, rk312x_miniloader_v2.63). Vendor boards ship Rockchip U-Boot 2014.10.Checked 2026-10-13 | |
| NPU toolkit | Not applicable: no NPU.Checked 2026-10-13 | |
| Video (MPP) | Rockchip MPP has rk3126 and rk3128 entries (both ROCKCHIP_SOC_RK312X): VPU1 decoder and post-processor, VEPU1 encoder, and a Rockchip HEVC 1080p decoder. RK3128H is a separate entry with different video blocks and is not covered here.Checked 2026-10-13 | |
| Android | Vendor images: Android 7.1 (Boardcon CM3128/EM3128), Android 6.0 (Boardcon Compact3128), Android 5.1 (Firefly-RK3128). Geniatech lists Android for the XPI-3128 with an Android software development guide.Checked 2026-10-13 | |
| Distributions | No official Armbian support: Armbian's build framework has no RK3128 family. Geniatech publishes a Debian 9 Linux SDK and Debian images for the XPI-3128; Boardcon lists Debian 9 for the EM3128; Firefly documented Ubuntu for its board. Community Armbian builds for RK3128 TV boxes run a 6.6.89 kernel forked from Rockchip sources.Checked 2026-10-13 | |
| Community | Firefly's wiki remains the most complete public RK3128 developer manual (boot modes, maskrom, kernel and Ubuntu builds, MIPI DSI and camera drivers). Community repos cover RK3128 handheld firmware and RK3126 tablet ports.Checked 2026-10-13 |
RK3128 / RK3126 on GitHub
Repositories for this chip: vendor code, mainline work, toolkits, distributions and open hardware.
- Kernelrockchip-linux/kernelRockchip BSP kernel; RK3128 device trees are on develop-4.19 through develop-6.12 in arch/arm. Last commit 2026-08.
- Kernelchieunhatnang-personal/linux-kernel-6.6-rk3128-tvboxRockchip 6.6 kernel adapted for RK3128 TV boxes. Last commit 2026-04.
- Kerneltorvalds/linuxMainline Linux has rk3128.dtsi with only the EVB and XPI-3128 boards. Last commit 2026-10.
- Bootloaderrockchip-linux/rkbinDDR init and loaders; bin/rk31 holds the rk3128, rk3128x and rk3126 binaries. Last commit 2026-08.
- Bootloaderu-boot/u-bootMainline U-Boot has RK3128 SoC support with evb-rk3128_defconfig. Last commit 2026-10.
- Mediarockchip-linux/mppMedia Process Platform; osal/mpp_soc.c includes rk3128 and rk3126 for the VPU. Last commit 2026-09.
- Mediaairockchip/librgaRGA 2D acceleration library with RK3128 and RK3126C in its supported chip list. Last commit 2026-06.
- Toolsrockchip-linux/rkdeveloptoolRockchip open source USB flashing tool for maskrom and loader mode, the Linux and macOS alternative to RKDevTool. Last commit 2025-03.
- Toolsxboot/xrockLow level maskrom and loader mode tool that can also init DDR and run code over USB; chip support is listed in its README. Last commit 2026-08.
- Toolslinux-rockchip/rkflashtoolCommunity rkflashtool fork for reading and writing flash over USB in loader mode; its device table includes RK3128. Last commit 2025-09.
- Communityrealldz/rk3128-xmio-armbianArmbian on an RK3128 TV box with a kernel porting log, flash guide and reproducible builds. Last commit 2026-09.
- CommunityRuka-CFW/rk3128-cfwCustom firmware for RK3128 handhelds such as the Powkiddy A12 and A13; deprecated by its author but useful as a reference. Last commit 2022-06.
RK3128 / RK3126 system on modules
Any of these can sit on a carrier board we design.
| Module | Vendor | Connector | RAM | Design files | Price | Buy |
|---|---|---|---|---|---|---|
| CM3128 | Boardcon | 148-pin solder-down, 1.3 mm pitch (QFN style) | 512 MB or 1 GB DDR3 | hardware manual PDF with pinout, reference circuits and footprint |
Every public RK3128 / RK3126 board
| Board | Vendor | Type | RAM | Notable I/O | Design files | Price | Buy |
|---|---|---|---|---|---|---|---|
| Firefly-RK3128 | Firefly (T-Chip) | SBC, Core board 67.6 x 40 mm on a 117 x 85 mm baseboard | 1 or 2 GB DDR3 | RK818 PMIC, GbE (RTL8211E), 4x USB 2.0 host, 1x OTG, HDMI, CVBS, MIPI or LVDS, 84-pin expansion header | baseboard schematic and placement PDFs listed on the wiki, but the files are no longer available | CNY 459 (Firefly store, out of stock) | |
| XPI-3128 | Geniatech | SBC, 85 x 56 mm, Raspberry Pi form factor and 40-pin GPIO | 512 MB to 2 GB DDR3 | 10/100 Ethernet, 4x USB 2.0, USB-C power, HDMI, Wi-Fi 5 and BT 4.0 (optional), Mainline Linux device tree | none; specification PDF, software guides and Debian 9 SDK | ||
| EM3128 | Boardcon | Dev kit, 112 x 90 mm carrier with CM3128 | 512 MB or 1 GB | 10/100 Ethernet (LAN8720A), HDMI 1.4, LVDS/MIPI/RGB, CVBS, DVP camera, USB 2.0 host and OTG | overview diagram PDF | ||
| Compact3128 | Boardcon | SBC, 85 x 56 mm | 512 MB or 1 GB DDR3 | GbE (RTL8211E), 4x USB 2.0 host, 1x OTG, HDMI, 30-pin LVDS/MIPI FPC, 40-pin header, 24-pin camera FPC | overview diagram PDF |
Prices and links as checked on the dates in our data; the latest check on this page was 2026-10-13. Amazon links marked * are affiliate links; see our disclosure.
Buying the chip
Rockchip publishes no RK3128 price or distributor list, and its current RK31 series page lists only the RK3126. Low single-unit LCSC pricing suggests the part is still in circulation, but no lifecycle or end-of-life notice was found either way.
- LCSC
- Lists RK3128 (C191248, BGA-316) from 1 piece: USD 5.35 at 1+, USD 4.92 at 100+, 13 in stock when checked. Not confirmed as an authorized Rockchip channel. No RK3126 or RK3126C listing found.
Datasheet, TRM and design documents
Linked where they are publicly hosted; we do not rehost Rockchip documents. These are third-party documents: we are not responsible for their accuracy, availability or confidentiality status. Disclosure.
- DatasheetRockchip RK3128 DatasheetRev 0.6 · 2014-08-15 · hosted by LCSC (distributor) · checked 2026-10-13
- DatasheetRockchip RK3128 DatasheetRev 1.2 · 2017-07-20 · community mirror (rockchip.fr (community mirror)), not hosted by Rockchip · checked 2026-10-13
- DatasheetRockchip RK3126 DatasheetRev 1.0 · 2014-09-02 · community mirror (rockchip.fr (community mirror)), not hosted by Rockchip · checked 2026-10-13
- DatasheetRockchip RK3126C DatasheetRev 1.1 · 2019-11-07 · community mirror (rockchip.fr (community mirror)), not hosted by Rockchip · checked 2026-10-13
- TRMRockchip RK312X Technical Reference Manual (folder "RK312X TRM" in the listing), 28 chapters (CRU, GRF, PMU, LVDS, HDMI TX, USB, GMAC, MIPI DSI and D-PHY, others)Rev 1.0 (chapter 1 Rev 0.1) · community mirror (rockchip.fr (community mirror)), not hosted by Rockchip · checked 2026-10-13
- PMICRockchip RK816 Datasheet (PMIC used on RK3126 tablets)Rev 1.3 · 2017-11 · community mirror (rockchip.fr (community mirror)), not hosted by Rockchip · checked 2026-10-13
- Product briefRockchip RK3126 product pagehosted by Rockchip · checked 2026-10-13
- PMICRockchip RK818 Datasheet (PMIC with charger and fuel gauge)Rev 1.1 · 2019-08-27 · hosted by LCSC (distributor) · checked 2026-10-13
- OtherBoardcon CM3128 Reference User Manual (pinout, reference circuits, footprint)V2.202107 · 2021-07 · hosted by Boardcon · checked 2026-10-13
- OtherFirefly-RK3128 Product Specifications (RK818, core board pinout)V1.0 · 2018-05-15 · hosted by Firefly · checked 2026-10-13
- OtherGeniatech XPI-3128 SpecificationV1.2 (file named v1.3) · 2022-07-04 · hosted by Geniatech · checked 2026-10-13
- OtherBoardcon EM3128 overview diagramhosted by Boardcon · checked 2026-10-13
- Otherrk3128.dtsi, mainline Linux device treev7.3-rc7 · hosted by kernel.org · checked 2026-10-13
- Otherrk3128-xpi-3128.dts, mainline device tree (power rails, RMII Ethernet)v7.3-rc7 · hosted by kernel.org · checked 2026-10-13
- OtherRockchip vendor kernel develop-4.4: rk312x, rk3126, rk3126c and rk3128 device treeshosted by Rockchip (GitHub) · checked 2026-10-13
- Otherclk: rockchip: rk3128: modify rk3128 clk driver to support rk3126 (Elaine Zhang, Rockchip)2017-07-25 · hosted by linux-rockchip list (infradead.org) · checked 2026-10-13
- OtherFix and improve Rockchip RK3128 support, cover letter (Alex Bee)2023-08-29 · hosted by linux-rockchip list (infradead.org) · checked 2026-10-13
- OtherRockchip MPP SoC table (rk3126, rk3128 video blocks)hosted by Rockchip (GitHub) · checked 2026-10-13
- Otherrkbin: RK3126/RK3128 DDR init, miniloader and USB plug binarieshosted by Rockchip (GitHub) · checked 2026-10-13
- OtherU-Boot Rockchip board documentation (evb-rk3128)hosted by U-Boot project · checked 2026-10-13
Questions about the RK3128 / RK3126
Not the RK3128 / RK3126 itself. We have designed and brought up boards on the Rockchip RV1106, RV1126, RV1126B, RK3566, RK3568, RK3576 and RK3588, and on the Allwinner T507 and A527/T527. The work carries over: power tree, DDR and high-speed layout, bring-up and the BSP, read against this chip's own datasheet.
The newest public revision is Rev 1.2 (2017-07-20), on the rockchip.fr community mirror; Boardcon used to host it but no longer does. The distributor LCSC hosts the older Rev 0.6 (2014-08-15). A partial RK312X TRM (28 chapters) is on the same mirror. No hardware design guide or reference schematic is public; the Boardcon CM3128 manual and Firefly wiki are the practical design references.
Same quad Cortex-A7 and Mali-400 MP2. The RK3126 is an LQFP176 tablet part with a 16-bit DDR3 bus (1 GB max), MIPI DSI, LVDS and RGB panels and no HDMI or GMAC in its datasheet; the RK3128 is a TFBGA316 TV-box part with 32-bit DDR3/LPDDR2, HDMI, CVBS and a GMAC. The RK3126C is a later LQFP176 tablet part with DDR3-800 and 720p30 encode.
Mostly. As of 7.3-rc7 mainline has SMP and CPU frequency scaling, GMAC, USB, the Mali-400 via Lima, VOP display with HDMI and MIPI DSI, I2S, SPDIF, SFC and the Hantro VPU. The H.265 decoder has no mainline driver. Only the RK3128 EVB and Geniatech XPI-3128 have upstream device trees; the RK3126 has clock support only.
Neither. The datasheet lists no NPU, PCIe, SATA or USB 3.0. Its fastest interfaces are DDR3, HDMI 1.4 and the LVDS/MIPI DSI panel output; Ethernet is a single GMAC with an external PHY.
The RK3128 is 32-bit Cortex-A7 with 1080p video and DDR3. The RK3326 moves to 64-bit Cortex-A35 with a Mali-G31 for tablets and handhelds, and the RK3328 adds Cortex-A53 cores, 4K HDR decode and USB 3.0 for TV boxes. Choose the RK3128 only to maintain an existing design or when 32-bit Linux and 1080p are enough at the lowest chip price.
Boardcon lists the CM3128: 55 x 45 mm, 148-pin 1.3 mm pitch solder-down, 512 MB or 1 GB DDR3, single 3.3 V input, with the EM3128 carrier as its dev kit. Firefly-RK3128 also uses a 67.6 x 40 mm core board with SIP headers, but Firefly sells it only with its baseboard.
Related chips and reading
- RK3326 / PX30Handhelds, HMI panels, smart audio, kiosks
- RK3328Routers, TV boxes, Klipper hosts
- RK3528TV boxes, media players, small routers
- RK3288Signage, HMI panels, kiosks, legacy 32-bit products
- RK3566HMI, e-ink readers, handhelds, CM4-class SoMs, small routers
We'll design your RK3128 board.
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Links and facts on this page checked 2026-10-13. Spotted something out of date? Tell us through the contact form.
Compiled from publicly available sources: datasheets, technical reference manuals, vendor product pages, schematics and source code published by their owners and third parties. We link to documents where others host them and do not host, endorse or vouch for them. Everything on these pages, including our own specs, summaries, block diagrams, comparisons, calculators and design notes, is for reference only and may contain errors or be out of date. It is provided as is, and Groundplane is not responsible for errors in it, for third-party documents, or for any design, board or decision based on it. Always check the manufacturer's current datasheet, reference manual and design guidance before you design a board. Rockchip, Allwinner, Raspberry Pi and other product names are trademarks of their owners; we are not affiliated with any of them. See our disclosure.