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Our cloud gaming infrastructure runs on the RV1103, the smaller part in this family. Case study: Cloud Gaming Infrastructure

RV1106 / RV1103

A single-core Cortex-A7 camera SoC with the DRAM inside the package: a QFN, no DDR routing and a 0.5 to 1 TOPS NPU, but a hard 64, 128 or 256 MB memory ceiling, no video decoder and 10/100 Ethernet only.

RV1106G2 package, studio render
RV1106G2, rendered by Groundplane. Not to scale.
CPU
1x Cortex-A7 + MCU
GPU
None (2D RGA only)
NPU
0.5 or 1.0 TOPS
Video
Enc 5M@30 (G2) or 8M@15 (G3), no decode
PCIe
None
Verdict

What the RV1106 / RV1103 is for

Right for

  • Battery and PoE IP cameras: H.265/H.264 encode at 5MP@30 (RV1106G2) with a hardware ISP, on a part whose DRAM is already in the package
  • Low-cost two-layer-friendly Linux designs: QFN128 (RV1106) or QFN88 (RV1103) with no external DDR to route
  • Small NPU inference at the edge: 0.5 TOPS (RV1103) or 1.0 TOPS (RV1106G2 and G3 per datasheet Rev 2.0) with INT4/INT8/INT16, enough for YOLO-class detection on one camera
  • Network appliances that capture and encode video: IP KVMs and RTSP bridges (JetKVM and Luckfox PicoKVM ship on the RV1106)
  • Tiny 10/100 Ethernet gateways: on-chip MAC and PHY, USB 2.0 OTG and a 64 MB RV1103 cost floor

Wrong for

  • Anything needing more than 256 MB of RAM: there is no external DRAM interface, memory is fixed by the part number
  • Playback or transcoding: the datasheet lists an encoder only, with no video decoder
  • Displays above 1280x720 or HDMI/MIPI DSI output: only parallel RGB, serial RGB and MCU LCD are listed
  • Gigabit Ethernet, PCIe, SATA or USB 3: none exist on the chip
  • Products that need a mainline kernel today: as of Linux 7.3-rc7 only RV1106 pinctrl and clock drivers are upstream, with no RV1106 SoC devicetree

Cost and constraints

  • Memory is chosen by ordering code, not by layout: RV1103G1 64 MB DDR2, RV1106G2 128 MB DDR3L, RV1106G3 256 MB DDR3L
  • RV1106G3 is not a straight upgrade: it doubles RAM (and NPU, per datasheet Rev 1.8; Rev 2.0 rates both parts at 1.0 TOPS) but its maximum input and encode is 8MP@15 against 5MP@30 on the G2
  • Software is the Rockchip IPC SDK on Linux 5.10.160 and U-Boot 2017.09, distributed in practice through board vendors (Luckfox, LubanCat)
  • Single-unit LCSC pricing on 2026-10-13: RV1106G2 USD 14.24, RV1106G3 USD 25.29, so the G3 nearly doubles the SoC line of the BOM
  • Rockchip's English product index now lists RV1103B, RV1106B and RV1126B in the RV11 series, not the RV1103 or RV1106
Block diagram

Inside the RV1106 / RV1103

Drawn by Groundplane from the datasheet rev 1.8. Not Rockchip artwork.

Specs

Read from the documents

Each value names the document it was read from.

CPU1x Cortex-A7 (Armv7-A) with NEON and FPU, 32 KB I + 32 KB D L1, 128 KB L2; plus an MCU with 16 KB cache. The datasheet states no clockDatasheet Rev 1.8, 1.2.1, 1.2.3
NPU1.0 TOPS for RV1106G2 and RV1106G3 (Rev 2.0 corrects Rev 1.8, which gave the G2 0.5 TOPS); INT4, INT8 and INT16Datasheet Rev 2.0, 1.2.5
NPU (RV1103)Up to 0.5 TOPS; INT4, INT8 and INT16Datasheet Rev 1.1, 1.1
GPUNo 3D GPU. 2D graphics engine: 8192x8192 source, 4096x4096 destination, scaling 1/16 to 16, rotation, alpha blendDatasheet Rev 1.8, 1.2.7
Video encodeH.265 Main and H.264 High, level 5.0; RV1106G2 up to 5MP@30, RV1106G3 up to 8MP@15; JPEG to 4MP@60; up to 60 MbpsDatasheet Rev 1.8, 1.2.4
Video encode (RV1103)H.265/H.264 up to 4MP@30; JPEG to 4MP@60Datasheet Rev 1.1, 1.2.4
Video decodeNone listed: the datasheet describes an encoder onlyDatasheet Rev 1.8, 1.2.4
Camera2x MIPI CSI D-PHY v1.2, 2 lanes at 1.5 Gbps each, combinable to one 4-lane (MIPI or LVDS); 1x DVP 8/10/12/16-bit to 150 MHz (BT.601/656/1120); up to 3 sensorsDatasheet Rev 1.8, 1.1, 1.2.8
ISPMax input RV1106G2 3072x1728@30, RV1106G3 3840x2160@15; 2-frame HDR, 3DNR, 2DNR, LSC, dehaze, LDCH; up to 4 sensors on the shared ISPDatasheet Rev 1.8, 1.2.9
MemoryIn-package 16-bit DDR3L: 1 Gb (128 MB) on RV1106G2, 2 Gb (256 MB) on RV1106G3. No external DRAM interfaceDatasheet Rev 1.8, 1.2.2, 2.1
Memory (RV1103)In-package 16-bit DDR2, 512 Mb (64 MB), orderable as RV1103G1Datasheet Rev 1.1, 1.2.2, 2.1
Storage and booteMMC 4.51 (HS200, 1/4/8-bit), SD 3.0 4-bit, FSPI serial flash 1/2/4-bit. BootROM boots SPI, eMMC or SD; download over USB or UARTDatasheet Rev 1.8, 1.2.2
DisplayParallel RGB 18-bit (RGB666) or 16-bit (RGB565), serial RGB, MCU LCD; max 1280x720; one Win layerDatasheet Rev 1.8, 1.2.10, 1.2.11
PCIeNoneDatasheet Rev 1.8
USB1x USB 2.0 host/device (HS, FS, LS), EHCI and OHCIDatasheet Rev 1.8, 1.2.13
Ethernet1x 10/100 MAC with embedded PHY (RMII)Datasheet Rev 1.8, 1.2.13
AudioI2S0 8-channel TX and RX to 192 kHz; codec with two 24-bit ADC and one 24-bit DAC, differential or single-ended mic inputDatasheet Rev 1.8, 1.2.12
Other I/OSDIO 3.0 4-bit, 6x UART (to 4 Mbps), 5x I2C, 2x SPI, 12x PWM, 2-channel 10-bit SARADC, RTC (32.768 kHz), TS-ADC, 8 Kbit OTPDatasheet Rev 1.8, 1.2.3, 1.2.13, 1.2.14
SecurityCrypto engine (AES, DES/TDES, SHA-1/256, MD5, HMAC, PKA to 4096-bit for RSA/ECC/SM2), TRNG, secure OTP, TrustZoneDatasheet Rev 1.8, 1.2.3
Power domainsThree separate voltage domains: VDD_ARM, VDD_LOGIC, VDD_PMU; DVFS on the CPU domainDatasheet Rev 1.8, 1.2.1, 1.2.3
PackageRV1106: QFN128, 12.3 x 12.3 mm, 0.35 mm pitch, MSL3, 1520 per trayDatasheet Rev 1.8, 1.2.14, 2.1, 2.4
Package (RV1103)QFN88, 9 x 9 mm, 0.35 mm pitch, 2600 per trayDatasheet Rev 1.1, 1.2.12, 2.1
ThermalRV1106 QFN128: theta-JA 27.3, theta-JB 12.5, theta-JC 8.4 C/W (JEDEC 2S2P, simulated); Tj max 125 CDatasheet Rev 1.8, 4.1, 4.2

Variants

RV1106G21.0 TOPS NPU per datasheet Rev 2.0 (0.5 TOPS in Rev 1.8 and earlier), 1 Gb (128 MB) DDR3L in package, input and encode up to 5MP@30 (3072x1728). QFN128.Datasheet Rev 2.0
RV1106 (BGA313)Added in datasheet Rev 2.0: the RV1106 die in a BGA313 package with external 16-bit DDR2-1056, DDR3/DDR3L-2133 or DDR4-2400 (up to 1024 MB addressing) instead of in-package DRAM; 1.0 TOPS NPU, 8MP@15. Package quantity still TBD in the order table.Datasheet Rev 2.0
RV1106G31.0 TOPS NPU, 2 Gb (256 MB) DDR3L in package, input and encode up to 8MP@15 (3840x2160). Same QFN128 and pinout as the G2; the extra resolution costs half the frame rate.Datasheet Rev 1.8
RV1103 (RV1103G1)0.5 TOPS NPU, 512 Mb (64 MB) DDR2 in package, 4MP@30 ISP and encode, QFN88 9 x 9 mm. Its feature list has no eMMC boot, DVP, display output, RTC or I2S0, and supports two sensors instead of three. Datasheet Rev 1.5 (2025-12-12, mirror) also trims the listed peripherals to 4 UART, 3 I2C, 1 SPI and 11 PWM (Rev 1.1: 6, 5, 2 and 12).Datasheet Rev 1.5
RV1103BA newer, separate chip: single Cortex-A7 plus MCU, INT8 NPU (the datasheet gives no TOPS figure; the product page says 0.5 TOPS), embedded DDR by suffix (G1 512 Mb DDR2, G2 1 Gb DDR3L, G3 2 Gb DDR3L), eMMC 4.51, H.264/H.265 encode up to 3840x2160@25, ISP input up to 3840x2160@20, two MIPI CSI, QFN88 9 x 9 mm, -20 to 85 C ambient. Mainline Linux treats it as its own SoC (rockchip,rv1103b) with its own pinctrl and clock driver.Datasheet Rev 1.3
RV1106BThe RV1103B with an LPMCU and an always-on video (AOV) subsystem added (SPI slave camera input, dedicated SPI flash master, low-power control unit). Otherwise the same feature text: INT8 NPU with no TOPS figure, G1/G2/G3 with 512 Mb DDR2, 1 Gb or 2 Gb DDR3L, 3840x2160@25 encode, QFN88 9 x 9 mm. Not covered in depth here.Datasheet Rev 1.3
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